Prerna Priyadarshini;Abhijat Bharadwaj;Biswabandan Panda
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引用次数: 0
Abstract
The shared last-level cache (LLC) enables cross-core contention-based attacks. While LLC randomization mitigates conflict-based attacks, cache partitioning prevents all attack classes. Recent secure partitioning techniques dynamically allocate LLC space and claim security against cache occupancy attacks. We show that state-of-the-art LLC usage-based dynamic partitioning remains vulnerable. Focusing on Secure and Scalable Cache Partitioning (SCALE), which applies differential privacy–based noise to LLC way allocations, we demonstrate that allocations can be denoised over time to construct a reliable LLC occupancy channel. The key insight that drives the occupancy channel is that differential privacy protects individual allocations; it does not hide long-term statistics such as the mean, median, and standard deviation. We showcase a novel LLC occupancy attack that does application fingerprint exploiting statistical properties. Finally, we propose lightweight fixes that mitigate this leakage.
期刊介绍:
IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing. Submissions are welcomed on any topic in computer architecture, especially but not limited to: microprocessor and multiprocessor systems, microarchitecture and ILP processors, workload characterization, performance evaluation and simulation techniques, compiler-hardware and operating system-hardware interactions, interconnect architectures, memory and cache systems, power and thermal issues at the architecture level, I/O architectures and techniques, independent validation of previously published results, analysis of unsuccessful techniques, domain-specific processor architectures (e.g., embedded, graphics, network, etc.), real-time and high-availability architectures, reconfigurable systems.