Energy-efficient and fault-tolerant demultiplexer design in QCA nanotechnology

Abstract

The dimension of traditional transistor is scaled down in the nanoscale regime, which causes size scalability and secondary issues restrictions for the complementary metal oxide semiconductor (CMOS) technology. To address these challenges in the nanoscale regime, there is a need for a prospective CMOS successor. Quantum-dot cellular automata (QCA) is a promising nanotechnology for designing circuits in the nanoscale regime. QCA emerges as the circuit design technology that can replace transistor technology completely in the nanoscale regime. A demultiplexer is an important operation in a communication system. Hence, a single-layered elementary 1:2 demultiplexer is proposed in QCA technology using 18 QCA cells and a single clock phase. The proposed 1:2 demultiplexer is tested for a single cell missing and addition faults. To check the effectiveness of the proposed 1:2 demultiplexer for higher order circuit, a single-layered 1:4 demultiplexer is also developed using the proposed 1:2 demultiplexer. The proposed designs are compared with the existing works to evaluate the performance. The proposed 1:2 and 1:4 demultiplexers reduce cells count by 5.26% and 4.17%, respectively, as compared to the best-reported work. The energy dissipation is also computed to confirm the circuits’ energy-efficient behaviour using QCA Designer-E and QCA Pro tools. The proposed 1:2 and 1:4 demultiplexers minimize the energy dissipation by 12.27% and 8.67%, respectively, at 1.5 kink energy level as compared to the available work.