Design and Implementation of RISC-V-Based SoC for Electric Vehicle Traction Application

Abstract

This letter presents the design and implementation of a RISC-V-based system-on-chip (SoC) on the Arty A7-100T FPGA platform, specifically optimized for electric vehicle (EV) traction control applications. By leveraging the open-source Shakti E-Class core, the proposed SoC integrates deterministic Six-Pulse commutation, hardware-accelerated pulse width modulation (PWM), and robust fault resilience to address critical real-time control challenges inherent in legacy microcontroller. Empirical validation demonstrates a 35% reduction in Mean RMS speed error, less than 2% speed oscillation amplitude under load perturbations, and a 39% improvement in worst-case response time compared to conventional systems. The architecture’s extensibility and security features underscore RISC-V’s potential as a scalable, cost-efficient foundation for next-generation EV controllers, despite current deployment as a standalone system with network integration envisioned for future development.