Void-free Cu/dielectric hybrid bonding at low-temperature enabled by ultrathin metal passivation engineering for 3D-IC applications.

IF 7
Hemanth Kumar Cheemalamarri, Masahisa Fujino, Tanmay Ghosh, Ratan Bhimrao Umralkar, Chandra Rao B S S, Navab Singh, Srinivasa Rao Vempati
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Abstract

Copper (Cu) surface topography, galvanic corrosion at the Cu-barrier interface and Cu-to-dielectric bonding primarily due to the misalignment are the present critical challenges in achieving void-free hybrid bonding. Additionally, Cu surface oxidation and dishing remain key bottlenecks in enabling reliable Cu interconnections at low temperatures in Cu/dielectric (SiO₂) hybrid bonding. To overcome these limitations, here we introduced a fabrication strategy that integrates an ultrathin metal (titanium (Ti)) passivation layer selectively engineered for Cu bond pads while maintaining compatibility with the damascene process. Despite the presence of the passivation layer, the observed Cu diffusion across the bonding interface and improved electrical contact resistance provides direct evidence of enhanced interfacial interdiffusion and oxidation resistance. This approach offers a scalable and effective solution for mitigating fundamental challenges in Cu/SiO₂ hybrid bonding and holds strong potential for integration into three-dimensional heterogeneous packaging technologies, enabling low thermal budget processing at ≤ 250 °C for ≤ 1-2 hour.

通过超薄金属钝化工程实现3D-IC应用的低温无空隙Cu/介电杂化键合。
铜(Cu)的表面形貌、Cu势垒界面的电偶腐蚀以及主要由错位引起的Cu-介电键合是目前实现无空隙杂化键合的关键挑战。此外,Cu表面氧化和碟形仍然是在Cu/介电(SiO₂)杂化键合中实现低温可靠Cu互连的关键瓶颈。为了克服这些限制,我们介绍了一种制造策略,该策略集成了一种超薄金属(钛(Ti))钝化层,该钝化层选择性地设计用于铜键焊盘,同时保持与大马士革工艺的兼容性。尽管存在钝化层,但观察到的Cu在键合界面上的扩散和改善的电接触电阻为界面间扩散和抗氧化性增强提供了直接证据。该方法提供了一种可扩展且有效的解决方案,可缓解Cu/SiO 2杂化键合的基本挑战,并具有集成到三维异质封装技术的强大潜力,可在≤250°C下进行≤1-2小时的低热预算处理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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