All-optical AND Logic Gate With High Extinction Ratio for Neural Network Hardware Implementation

IF 3.8 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Rita Asquini;Alessio Buzzin;Badrul Alam;Andrea Ceschini;Antonello Rosato;Massimo Panella
{"title":"All-optical AND Logic Gate With High Extinction Ratio for Neural Network Hardware Implementation","authors":"Rita Asquini;Alessio Buzzin;Badrul Alam;Andrea Ceschini;Antonello Rosato;Massimo Panella","doi":"10.1109/JETCAS.2025.3623865","DOIUrl":null,"url":null,"abstract":"The development of optical logic gates suitable for multi-stage processes is a central issue in emerging computational applications such as optical neural networks. In this work, we introduce and analyze a scheme for an all-optical AND logic gate, which allows achieving an almost ideal extinction ratio, a feature that simplifies cascaded architectures for complex operations such as multibit sums and multiplications. We analytically demonstrate how our scheme forces three logical states, namely ‘00’, ‘11’ and ‘10’, to be necessarily ideal in behavior. We also outline the conditions for ideal behavior of the remaining logical state ‘01’, which requires the use of semiconductor optical amplifiers (SOA) in their non-linear operations, by tuning the optical input and feeding current. Our numerical analysis on symmetrically balanced SOAs shows that there are multiple conditions enabling a very small output at logical ‘01’; also, our results suggest that those solutions are strongly influenced by the phase shifts induced in SOAs, which requires to avoid small <inline-formula> <tex-math>$\\alpha $ </tex-math></inline-formula> factors. The performance outlined in our transitions are promising for the implementation of universal gates to be deployed in future architectures for neural optical computation.","PeriodicalId":48827,"journal":{"name":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","volume":"16 1","pages":"106-114"},"PeriodicalIF":3.8000,"publicationDate":"2025-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11208673/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

The development of optical logic gates suitable for multi-stage processes is a central issue in emerging computational applications such as optical neural networks. In this work, we introduce and analyze a scheme for an all-optical AND logic gate, which allows achieving an almost ideal extinction ratio, a feature that simplifies cascaded architectures for complex operations such as multibit sums and multiplications. We analytically demonstrate how our scheme forces three logical states, namely ‘00’, ‘11’ and ‘10’, to be necessarily ideal in behavior. We also outline the conditions for ideal behavior of the remaining logical state ‘01’, which requires the use of semiconductor optical amplifiers (SOA) in their non-linear operations, by tuning the optical input and feeding current. Our numerical analysis on symmetrically balanced SOAs shows that there are multiple conditions enabling a very small output at logical ‘01’; also, our results suggest that those solutions are strongly influenced by the phase shifts induced in SOAs, which requires to avoid small $\alpha $ factors. The performance outlined in our transitions are promising for the implementation of universal gates to be deployed in future architectures for neural optical computation.
用于神经网络硬件实现的高消光比全光逻辑门
适合多阶段处理的光逻辑门的开发是新兴计算应用(如光神经网络)的中心问题。在这项工作中,我们介绍并分析了一种全光和逻辑门的方案,该方案允许实现几乎理想的消光比,这一特性简化了复杂操作(如多位求和和乘法)的级联架构。我们分析地展示了我们的方案如何迫使三个逻辑状态,即“00”、“11”和“10”在行为上必然是理想的。我们还概述了剩余逻辑状态“01”的理想行为条件,这需要在其非线性操作中使用半导体光放大器(SOA),通过调整光输入和馈电电流。我们对对称平衡soa的数值分析表明,有多种条件可以在逻辑‘ 01 ’处实现非常小的输出;此外,我们的结果表明,这些解决方案受到soa中引起的相移的强烈影响,这需要避免小的$\alpha $因素。我们在转换中概述的性能为在未来的神经光学计算架构中部署通用门的实现提供了希望。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
CiteScore
8.50
自引率
2.20%
发文量
86
期刊介绍: The IEEE Journal on Emerging and Selected Topics in Circuits and Systems is published quarterly and solicits, with particular emphasis on emerging areas, special issues on topics that cover the entire scope of the IEEE Circuits and Systems (CAS) Society, namely the theory, analysis, design, tools, and implementation of circuits and systems, spanning their theoretical foundations, applications, and architectures for signal and information processing.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信
小红书