Ling Zheng , Jingzhuo Liu , Keyao Zhang , Qianxi Men , Li Zhen , Weitao Pan
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引用次数: 0
Abstract
In the Industrial Internet of Things (IIoT), the real-time interaction of critical control and sensing data imposes stringent requirements on network determinism and reliability. Time-Sensitive Networking (TSN) is widely utilized to ensure low latency and high-precision synchronization; however, efficiently coordinating the nanosecond-level determinism of Time-Triggered (TT) traffic with the high throughput of Event-Triggered (ET) traffic remains a core challenge. Existing Guard Band mechanisms lead to significant bandwidth waste due to fixed reserved windows, while traditional frame preemption mechanisms, though improving efficiency, still suffer from unpredictable TT frame delays. To address these issues, this paper proposes and validates two novel frame preemption strategies. First, a Guard Band Compression and Non-Disruptive Frame Preemption model (GCNFP) is introduced, which compresses the guard band to 76 bytes and employs a padding mechanism to ensure zero-offset handling of ET frames within the guard window, thus eliminating transmission deviations caused by ET blocking and inter-frame gaps (IFG). Second, an enhanced model with judgment mechanism (JM-GCNFP) is developed, which dynamically monitors ET frame transmission within the guard window and delays preemption until the optimal moment. This adaptive strategy maximizes the use of available time slots while reducing unnecessary preemption and padding overhead. Simulation results show that both strategies achieve zero-offset scheduling and significantly improve system performance. Specifically, JM-GCNFP reduces the maximum ET frame delay by more than 40% and improves bandwidth utilization by nearly 20% under high-load scenarios, demonstrating the advantages in achieving enhanced network determinism and transmission efficiency.
期刊介绍:
The Journal of Systems Architecture: Embedded Software Design (JSA) is a journal covering all design and architectural aspects related to embedded systems and software. It ranges from the microarchitecture level via the system software level up to the application-specific architecture level. Aspects such as real-time systems, operating systems, FPGA programming, programming languages, communications (limited to analysis and the software stack), mobile systems, parallel and distributed architectures as well as additional subjects in the computer and system architecture area will fall within the scope of this journal. Technology will not be a main focus, but its use and relevance to particular designs will be. Case studies are welcome but must contribute more than just a design for a particular piece of software.
Design automation of such systems including methodologies, techniques and tools for their design as well as novel designs of software components fall within the scope of this journal. Novel applications that use embedded systems are also central in this journal. While hardware is not a part of this journal hardware/software co-design methods that consider interplay between software and hardware components with and emphasis on software are also relevant here.