MARVEL: A Reconfigurable Chiplet-Integrated Photonic Interposer With Optical Vertical Links and Robust Misalignment Tolerance

Abstract

Silicon photonic (SiPh) interposers offer a promising solution to overcome the bandwidth, latency, and energy limitations of electrical interconnects in chiplet-based systems. By enabling dense Wavelength Division Multiplexing (WDM) and high-speed optical signaling, they support scalable and efficient inter-chiplet communication. However, conventional SiPh interposer architectures face critical challenges, including fabrication-induced yield loss due to active photonic integration, and performance degradation from vertical link misalignments during packaging. This paper introduces MARVEL, a scalable and resilient SiPh interposer network that addresses these challenges through architectural and algorithmic innovations. MARVEL employs a passive interposer design, avoiding yield-limiting active components, and proposes to use optical vertical links (OVLs) to provide direct optical connections between chiplets and a centralized optical circuit switch (OCS). To mitigate the effects of packaging-induced misalignment, MARVEL incorporates redundancy-aware OVL selection using lightweight, reconfigurable on-chip switches. A dynamic in situ characterization protocol ranks available OVLs by loss, enabling the system to route traffic through the best performing links. This mechanism ensures 100% system reachability under modeled manufacturing variations. Additionally, MARVEL introduces a loss-aware recursive backtracking routing algorithm with precomputed lookup tables (LUTs) to optimize switch configurations for reduced insertion loss and tuning power. Comprehensive evaluations—including analytical modeling, Monte Carlo-based variability analysis, and discrete-event network simulation—show that MARVEL achieves up to 82% latency reduction over bus-based architectures and up to 86% improvement compared to prior work under synthetic traffic. On PARSEC benchmark workloads, MARVEL reduces latency by up to 75% while delivering approximately 10% total power savings. These results demonstrate MARVEL’s potential as a robust, energy-efficient, and scalable interposer architecture for next-generation heterogeneous computing platforms, including AI accelerators, high-performance computing (HPC), and data center systems.