Martin E.M. Loesener , Tobias Zinsler , Bernhard Stampfer , Florian Wimmer , Eleftherios Ioannidis , Walter Pflanzl , Rainer Minixhofer , Tibor Grasser , Michael Waltl
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引用次数: 0
Abstract
Advanced reliability simulators like Comphy capture much of the state-of-the-art modeling behind charge trapping processes. An alternative approach to Comphy is to apply stochastic models, e.g. the defect-centric model, directly to the experimental data to extract the impact of defects on the device behavior and trap densities. In order to efficiently design defect characterization experiments, however, it is of utmost importance to understand the robustness of the defect-centric model under a variety of pre-conditions. In this work, we evaluate the requirements to employ the defect-centric model for data analysis, using simulated data from Comphy based on a real 400 nm × 180 nm pMOS device. Our results show that the number of devices from wafer-level tests does not suffice for statistical evaluation of RTN analysis. Here, preferably array chips should be used. For BTI studies, both wafer-level and array-chip tests enable us to extract good estimates for defect parameters with little computational effort.
期刊介绍:
Microelectronic Engineering is the premier nanoprocessing, and nanotechnology journal focusing on fabrication of electronic, photonic, bioelectronic, electromechanic and fluidic devices and systems, and their applications in the broad areas of electronics, photonics, energy, life sciences, and environment. It covers also the expanding interdisciplinary field of "more than Moore" and "beyond Moore" integrated nanoelectronics / photonics and micro-/nano-/bio-systems. Through its unique mixture of peer-reviewed articles, reviews, accelerated publications, short and Technical notes, and the latest research news on key developments, Microelectronic Engineering provides comprehensive coverage of this exciting, interdisciplinary and dynamic new field for researchers in academia and professionals in industry.