An FFT Optimal Scaling Vector Search Scheme Based on Dynamic Programming

IF 1.8 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC
Jinwei Xie, Yubin Zhu, Kaining Han, Jianhao Hu
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引用次数: 0

Abstract

The fast Fourier transform (FFT) is widely used in digital signal processing. However, hardware implementations of the discrete Fourier transform (DFT)/FFT are limited by word length constraints, necessitating truncation, saturation, and scaling operations to balance hardware resources and computational performance. The choice of a suitable scaling vector significantly affects FFT efficiency. This paper introduces a novel estimation model for FFT error power, accounting for both quantization and saturation errors. Based on this model, we propose a dynamic programming (DP)-based scaling vector search scheme to reduce the search space and computational complexity. After 1000 experiments, the model demonstrated a mean and variance of relative error in signal-to-noise ratio (SNR) of 0.063 and 0.35, proving its effectiveness. In a case study of a 1024-point FFT, our model accurately estimated error power. While the exhaustive search yielded an optimal SNR of 65.91 dB, our method reduced the search space by 3600 times, with only a 0.3 dB loss in SNR. In a 256-point FFT hardware implementation, performance improved by over 10 dB. Our scheme achieves SNR performance comparable to other methods when bit width is fixed and superior SNR when bit width is variable. This approach offers guidance for selecting scaling vectors in FFT hardware design.

Abstract Image

Abstract Image

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一种基于动态规划的FFT最优缩放向量搜索方案
快速傅里叶变换(FFT)在数字信号处理中有着广泛的应用。然而,离散傅立叶变换(DFT)/FFT的硬件实现受到字长约束的限制,需要截断、饱和和缩放操作来平衡硬件资源和计算性能。选择合适的缩放向量对FFT效率有显著影响。本文介绍了一种考虑量化和饱和误差的FFT误差功率估计模型。在此模型的基础上,提出了一种基于动态规划(DP)的缩放向量搜索方案,以减少搜索空间和计算复杂度。经过1000次实验,该模型在信噪比(SNR)下的相对误差均值和方差分别为0.063和0.35,证明了该模型的有效性。在1024点FFT的案例研究中,我们的模型准确地估计了误差功率。虽然穷举搜索产生65.91 dB的最佳信噪比,但我们的方法将搜索空间减少了3600倍,信噪比仅损失0.3 dB。在256点FFT硬件实现中,性能提高了10 dB以上。当位宽固定时,该方案的信噪比性能与其他方法相当,当位宽可变时,该方案的信噪比优于其他方法。该方法为FFT硬件设计中缩放向量的选择提供了指导。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Iet Circuits Devices & Systems
Iet Circuits Devices & Systems 工程技术-工程:电子与电气
CiteScore
3.80
自引率
7.70%
发文量
32
审稿时长
3 months
期刊介绍: IET Circuits, Devices & Systems covers the following topics: Circuit theory and design, circuit analysis and simulation, computer aided design Filters (analogue and switched capacitor) Circuit implementations, cells and architectures for integration including VLSI Testability, fault tolerant design, minimisation of circuits and CAD for VLSI Novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs Device and process characterisation, device parameter extraction schemes Mathematics of circuits and systems theory Test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers
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