An integrated GaN PNP Bipolar Junction Transistor for ESD applications

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Pengfei Zhang , Zhijia Zhao , Gaoqiang Deng , Xiaorong Luo , Shuxiang Sun , Yuxi Wei , Jie Wei
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引用次数: 0

Abstract

In this paper, a novel ESD protection circuit incorporating GaN PNP BJT (Bipolar Junction Transistor) is proposed and simulated. Compared with the conventional diodes, resistive and capacitive GaN ESD clamp, the proposed new ESD circuit exhibits superior discharging capability on same chip area, and its clamping voltage is reduced by at least 5.1V under 1.5A TLP (transmission line pulsing) current. Meanwhile, the proposed ESD circuit reduces the overshoot voltage during its discharging channel opens. After that the characteristics of GaN BJT is also investigated. By introducing a p-GaN back barrier layer, new p-GaN HEMT's conduction characteristics and breakdown voltage are improved compared to the conventional p-GaN HEMT.
用于ESD应用的集成GaN PNP双极结晶体管
本文提出了一种新型的基于GaN PNP双极结晶体管的ESD保护电路,并进行了仿真。与传统的二极管、阻性和容性GaN ESD箝位电路相比,该电路在相同的芯片面积上具有优越的放电能力,在1.5A TLP(传输线脉冲)电流下,其箝位电压至少降低5.1V。同时,该电路降低了放电通道打开时的过调电压。然后对GaN BJT的特性进行了研究。通过引入p-GaN背势垒层,新型p-GaN HEMT的传导特性和击穿电压都比传统的p-GaN HEMT有所改善。
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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