{"title":"Thermally Stable and Cost-Efficient QCA-Based Co-Planar Design of a 4-Bit CSA with Optimized Cell Size Scaling","authors":"Hemanshi Chugh, Sonal Singh","doi":"10.1007/s10470-025-02510-0","DOIUrl":null,"url":null,"abstract":"<div><p>Quantum-dot Cellular Automata (QCA) offers a promising paradigm for ultra-low-power nanoscale computing. This paper introduces a novel co-planar design of a 4-bit, three-input carry-save adder (QCA-3<span>\\(\\times\\)</span>4B-CSA), leveraging an optimized full adder structure to enhance performance, reduce area, and minimize quantum cost. The proposed architecture is developed using QCADesigner v2.0.3 and benchmarked against state-of-the-art CSA implementations across multiple cell sizes (18<span>\\(\\times\\)</span>18 <i>nm</i>, 16<span>\\(\\times\\)</span>16 <i>nm</i>, and 14<span>\\(\\times\\)</span>14 <i>nm</i>). The proposed design achieves a 76.35% reduction in quantum cost compared to recent CSA implementations, while also minimizing cell count, layout area, and delay. Energy dissipation metrics is evaluated using QCAPro and QCADesigner-E, confirming significant energy efficiency. Thermal analysis further reveals robust output polarization stability up to 8<i>K</i>, demonstrating the circuit’s resilience under cryogenic conditions. Notably, the 14<span>\\(\\times\\)</span>14 <i>nm</i> cell layout delivers superior results across all performance metrics. These findings establish the QCA-3<span>\\(\\times\\)</span>4B-CSA as robust and scalable solution for future nano scale digitalarithmetic systems.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"125 2","pages":""},"PeriodicalIF":1.4000,"publicationDate":"2025-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-025-02510-0","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
Quantum-dot Cellular Automata (QCA) offers a promising paradigm for ultra-low-power nanoscale computing. This paper introduces a novel co-planar design of a 4-bit, three-input carry-save adder (QCA-3\(\times\)4B-CSA), leveraging an optimized full adder structure to enhance performance, reduce area, and minimize quantum cost. The proposed architecture is developed using QCADesigner v2.0.3 and benchmarked against state-of-the-art CSA implementations across multiple cell sizes (18\(\times\)18 nm, 16\(\times\)16 nm, and 14\(\times\)14 nm). The proposed design achieves a 76.35% reduction in quantum cost compared to recent CSA implementations, while also minimizing cell count, layout area, and delay. Energy dissipation metrics is evaluated using QCAPro and QCADesigner-E, confirming significant energy efficiency. Thermal analysis further reveals robust output polarization stability up to 8K, demonstrating the circuit’s resilience under cryogenic conditions. Notably, the 14\(\times\)14 nm cell layout delivers superior results across all performance metrics. These findings establish the QCA-3\(\times\)4B-CSA as robust and scalable solution for future nano scale digitalarithmetic systems.
量子点元胞自动机(QCA)为超低功耗纳米级计算提供了一个有前途的范例。本文介绍了一种新颖的共面设计的4位,三输入免进位加法器(QCA-3 \(\times\) 4B-CSA),利用优化的全加法器结构来提高性能,减少面积,并最大限度地降低量子成本。所提出的体系结构是使用qcaddesigner v2.0.3开发的,并针对多种单元尺寸(18 \(\times\) 18 nm、16 \(\times\) 16 nm和14 \(\times\) 14 nm)的最先进的CSA实现进行基准测试。所提出的设计达到了76.35% reduction in quantum cost compared to recent CSA implementations, while also minimizing cell count, layout area, and delay. Energy dissipation metrics is evaluated using QCAPro and QCADesigner-E, confirming significant energy efficiency. Thermal analysis further reveals robust output polarization stability up to 8K, demonstrating the circuit’s resilience under cryogenic conditions. Notably, the 14\(\times\)14 nm cell layout delivers superior results across all performance metrics. These findings establish the QCA-3\(\times\)4B-CSA as robust and scalable solution for future nano scale digitalarithmetic systems.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.