High-Performance and Scalable Ferroelectric Diodes Enabled via 2D-MoS2 Buffer Layer Under Low Thermal Budget

Abstract

Hafnium-based (Hf_0.5Zr_0.5O₂, HZO) ferroelectrics exhibit robust polarization switching even in ultrathin films and are compatible with atomic layer deposition (ALD), making them promising for two-terminal (2-T) non-volatile memory devices. However, their practical use remains limited by low ON/OFF ratios, high leakage currents, and poor endurance. Herein, A high-performance ferroelectric diode (FE-diode) based on a W/MoS₂/HZO/TiN stack is demostrated, fabricated entirely below 400 °C for back-end-of-line (BEOL) compatibility. Two strategies are employed: 1) optimization of the HZO thickness and 2) insertion of a 2D MoS₂ buffer layer at the top electrode/ferroelectric interface. Increasing the HZO thickness from 3 to 8 nm changed the dominant conduction mechanism from direct tunneling to Schottky emission, enabling polarization-driven barrier modulation. The MoS₂ buffer, synthesized via low-temperature (<300 °C) atmospheric pressure plasma-enhanced CVD, minimized interfacial defects and improved device stability. As a result, the FE-diode exhibited a high current density of 50 A cm⁻² (read at 3 V), an electroresistance ratio exceeding 2 × 10⁶, endurance over 10¹⁰ cycles, and stable memory retention of 10 years at room temperature. A 1 K (32 × 32) memory array is also demonstrated, confirming excellent scalability and the strong potential of this FE-diode design for next-generation integrated memory applications.