Two-Phase Flow Boiling for Ultra-High Heat Flux SiC Chip Cooling

Abstract

While Moore's Law has approached its physical limits lately, the high integration and miniaturization of electronics have also brought another thermal failure obstacle. Previous studies on single-phase flow demanded significant pump power to achieve higher Critical Heat Flux (CHF), which risked exceeding the chip's mechanical limits and complicating packaging. The elevated junction temperature (above 175°C) of third-generation semiconductors makes them ideal for two-phase water cooling, which utilizes the huge latent heat during boiling of water to minimize the flow rate and maximize the Coefficient of Performance (COP). In this work, we designed an embedded hierarchical microchannel heat sink for heat transfer by deionized water two-phase cooling. The combination of the distribution manifold and the hierarchical microchannel copper wick achieves a balance between a large number of nucleation sites and excellent permeability. We observed an CHF of 1682 W/cm² with COP up to ∼19000 at flow rate of 3.0 ml/s, which means Only 89 mW of power is needed to take away the heat flux of 1682 W/cm² on a chip, corresponding to a 3-fold increase compared to single-phase microchannels with the same flow rate. This technology is anticipated to overcome the bottleneck in electronic thermal management.