A comparative study of fault-tolerant multiplexer-based adders in CMOS 45 nm and QCA technologies

Abstract

As computing systems increasingly demand higher performance and lower power consumption, the need for energy-efficient and reliable arithmetic circuits has increased. Full adders, which are essential components of arithmetic units, play a critical role in optimizing power and performance in modern computing architectures. This paper presents a comparative analysis of a fault-tolerant multiplexer (MUX)-based Modified and Full Swing Full Adder (MFSFA), implemented in both CMOS 45 nm technology and Quantum-dot Cellular Automata (QCA) technology. We evaluate energy dissipation and power consumption using the Cadence 45 nm tool for CMOS and QCADesigner for QCA. Our findings show that while CMOS 45 nm technology provides strong performance, QCA designs achieve significant reductions in energy dissipation, making them suitable for ultra-low power applications. The trade-offs among power, area, and delay are examined, revealing the strengths and limitations of each technology. For the proposed CMOS 45 nm-based MFSFA, we note a delay of 118.75 ps, average power dissipation of 260 µW, and area of 131.76 μm² at 450 mV with an improvement of 65.19%, 60.5% and 51.03% those parameters respectively. In contrast, QCA technology shows parameters of 4 ps, 0.18 nW, and 0.05 μm² with an improvement of 91% and 82.14% in power dissipation and area respectively. This study highlights QCA’s potential as a viable alternative to traditional CMOS for energy-efficient, fault-tolerant circuit design in resource-constrained environments.