Work function engineered polarity-controlled TFET for digital circuit applications: design and performance analysis

Abstract

In this manuscript, a polarity-controlled TFET (PC-TFET) with an engineered work function is investigated for the realization of both primary and universal Boolean logic functions in digital applications. The primary objective of the proposed approach is to reduce the number of transistors required for implementing digital logic functions on a chip compared to conventional MOS-based technology. To achieve this, the p⁺ and n⁺ regions at the source and drain are induced using an appropriate work function on an ultra thin silicon film for n-type TFET. This single PC-nTFET device is highly versatile and capable of realizing all fundamental two-input Boolean functions, including NOT, OR, NAND, XOR, AND, and NOR by adjusting bias voltages at the control and polarity gates (CG and PG). The operational behavior of the realized logic functions is analyzed through various parameters, such as carrier concentrations, energy band diagrams, transfer characteristics, and transient characteristics. The decision to designate a higher ON-current as output logic “1" and a low OFF-current as output logic “0" is both practical and intuitive. Additionally, the junction- and doping-free nature of the proposed model represents a strategic design choice that simplifies fabrication complexity and reduces costs. Overall, this model demonstrates strong potential for the implementation of high-speed, power-efficient digital circuits and compact logic functions.