A novel fault-tolerant T flip-flop in ternary QCA

Abstract

While complementary metal-oxide-semiconductor (CMOS) technology has been widely adopted, challenges such as increasing leakage current and physical limitations have driven researchers toward emerging quantum-dot cellular automata (QCA) technology. Notable features of QCA include extremely high density, low power consumption, and high switching speed. Moreover, the design of multi-valued logic systems, as an alternative to standard binary systems, has gained significant interest among researchers. Designing digital circuits in a multi-valued system offers numerous advantages over traditional binary methods. This paper presents novel structures for T flip-flops in multi-valued QCA technology. The impact of single-cell omission and extra-cell deposition defects on the proposed circuits is investigated. Initially, a ternary T flip-flop is proposed based on 56 cells with a delay of 1.25 clock cycles and an area of 0.012 µm². Subsequently, a novel ternary T flip-flop is proposed by employing a new XOR design in the structure with only 33 cells, an area of 0.007 µm², and a delay of 1 clock cycle, exhibiting superior properties compared to previous designs. Additionally, in comparison with the most similar structure in the literature, our method requires 29% fewer cells. The present research evaluates the proposed ternary T flip-flop, considering the range of inherent defects in QCA systems. Among the existing defects, single-cell omission and extra-cell deposition defects of the proposed circuits are examined. Fault tolerance values higher than 70% for the proposed circuits indicate greater tolerance to the mentioned defects in these designs compared to their counterparts.