A novel low-voltage low-power very high gain fully differential CMOS class AB pure current mode current operational amplifier

IF 1.4 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Behnam Abdoli, Seyed Javad Azhari
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引用次数: 0

Abstract

In this paper, a novel fully differential (FD) class AB pure current mode current operational amplifier (COA) is designed and presented. In order to attain highly desired features such as high current gain, very high current drive ratio (Ioutmax/Ibias) low power consumption, high linearity and good frequency performance, a powerful feedback-based technique is included in the gain stage of the amplifier. Also using the fully differential and class AB structure, implementing FG-MOS transistors in the current output stage along with avoiding high impedance nodes leads to a greatly desired performance in terms of CMRR, PSRR, output current drive capability and low voltage - low power operation which makes the proposed COA suitable for mixed mode and accurate applications. The detailed operation of the proposed COA is far enough discussed, and its small-signal equations are provided. The outstanding properties of the amplifier are verified by Cadence simulations using TSMC 65 nm CMOS technology parameters. To study the robustness of the COA against technology and voltage non-idealities and get results as reliable and practical as measurement, pre-layout and post-layout simulations both plus Monte Carlo analysis are also performed. Under ± 0.9 V supply voltage and 68 µA output bias current, the proposed COA can deliver the output current of ± 1040 mA with THD of − 44 dB, output impedance of 1.88 MΩ, drive ratio (Ioutmax/Ibias) of 15,300, 108 dB gain, -3dB bandwidth of 14.8 MHz and low consumed power of 282 µw in pre-layout simulation. In post-layout plus Monte–Carlo simulation, the results are as 74 µA, ± 920 mA, − 42 dB, 1.64 MΩ, 12,450, 102 dB, 12.2 MHz and 298 µw for the same arrange of parameters in pre-layout. These results which are as close as possible to the measuring ones prove the remarkable performance of the proposed COA and its superiority over yet artworks.

Abstract Image

一种新型的低电压、低功率、高增益全差分CMOS AB类纯电流模电流运算放大器
本文设计并提出了一种新型的全差分(FD)类纯电流模式电流运算放大器(COA)。为了获得高电流增益、高电流驱动比(Ioutmax/Ibias)、低功耗、高线性度和良好的频率性能等高度期望的特性,放大器的增益级采用了一种强大的基于反馈的技术。此外,采用全差分和AB级结构,在电流输出级实现FG-MOS晶体管,避免高阻抗节点,在CMRR、PSRR、输出电流驱动能力和低电压低功耗操作方面获得了非常理想的性能,使所提出的COA适用于混合模式和精确应用。本文对所提出的COA的详细操作进行了充分的讨论,并给出了其小信号方程。采用台积电65nm CMOS工艺参数的Cadence仿真验证了该放大器的优异性能。为了研究COA对技术和电压非理想性的鲁棒性,并获得与测量结果一样可靠和实用的结果,还进行了布局前和布局后的仿真以及蒙特卡罗分析。在±0.9 V电源电压和68µA输出偏置电流下,该COA可提供±1040 mA的输出电流,THD为−44 dB,输出阻抗为1.88 MΩ,驱动比(Ioutmax/Ibias)为15,300,增益为108 dB, -3dB带宽为14.8 MHz,预布局仿真功耗为282µw。在布局后加蒙特卡罗仿真中,对于相同布局参数的排列,结果分别为74µA,±920 mA,−42 dB, 1.64 MΩ, 12,450, 102 dB, 12.2 MHz和298µw。这些结果与测量结果尽可能接近,证明了所提出的COA的卓越性能及其优于现有艺术品的优势。
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来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
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