{"title":"User clustering and power allocation based deep learning enabled hybrid feedback shark Lion optimization","authors":"Kasula Raghu, Puttha Chandrasekhar Reddy","doi":"10.1007/s10470-025-02460-7","DOIUrl":null,"url":null,"abstract":"<div><p>The Non-orthogonal multiple access (NOMA) systems have become a hopeful one that addresses the need for fifth-generation (5G) communication while resolving the issues with spectrum scarcity. NOMA’s major objective is to improve the spectrum utilization while sacrificing an effective utilization of resources. Therefore, this work designed an efficient user clustering as well the power allocation scheme with the aid of deep learning (DL) enabled White Feedback Sea Lion Optimization (WFSLnO). Here, the downlink femtocell NOMA power consumption scheme includes one macro-base Station (BS) contained by a cluster of femtocell BSs. In addition, user clustering is accomplished by Deep Fuzzy Clustering (DFC), in which the user grouping parameters like Signal-to-Interference-plus-Noise-ratio (SINR), position, initial power, and channel gain are utilized. Moreover, the Backpropagation Neural Network (BPNN) is employed for the power allocation process. Furthermore, the proposed WFSLnO optimized the BPNN’s hyperparameters. Here, the WFSLnO enabled BPNN’s power allocation performance is revealed by considering the metrics including energy efficiency, achievable rate, throughput, and sum rate, as well as the corresponding values achieved are 2.975 Mbits/sec, 0.039 Mbits/Joules, 18.49 Mbits/sec and 0.631Mbps.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"124 3","pages":""},"PeriodicalIF":1.4000,"publicationDate":"2025-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-025-02460-7","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
The Non-orthogonal multiple access (NOMA) systems have become a hopeful one that addresses the need for fifth-generation (5G) communication while resolving the issues with spectrum scarcity. NOMA’s major objective is to improve the spectrum utilization while sacrificing an effective utilization of resources. Therefore, this work designed an efficient user clustering as well the power allocation scheme with the aid of deep learning (DL) enabled White Feedback Sea Lion Optimization (WFSLnO). Here, the downlink femtocell NOMA power consumption scheme includes one macro-base Station (BS) contained by a cluster of femtocell BSs. In addition, user clustering is accomplished by Deep Fuzzy Clustering (DFC), in which the user grouping parameters like Signal-to-Interference-plus-Noise-ratio (SINR), position, initial power, and channel gain are utilized. Moreover, the Backpropagation Neural Network (BPNN) is employed for the power allocation process. Furthermore, the proposed WFSLnO optimized the BPNN’s hyperparameters. Here, the WFSLnO enabled BPNN’s power allocation performance is revealed by considering the metrics including energy efficiency, achievable rate, throughput, and sum rate, as well as the corresponding values achieved are 2.975 Mbits/sec, 0.039 Mbits/Joules, 18.49 Mbits/sec and 0.631Mbps.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.