Energy-Efficient flash ADC architecture based on MoS\({}_2\) transistors

IF 1.4 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Ashkan Horri
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Abstract

In this paper, we utilize the advantages of Molybdenum Disulfide (MoS\({}_2\)) transistors to design a Flash analog-to-digital converter (ADC) that achieves a reduced active area and dynamic power. MoS\({}_2\) field-effect transistors (FETs) are a class of emerging devices based on two-dimensional (2D) materials, offering high ON/OFF current ratios, excellent electrostatic control, and scalability, making them suitable for next-generation low-power electronics. To eliminate static power dissipation, the proposed ADC incorporates the threshold inverter quantization (TIQ) technique. A SPICE-compatible charge-based model for MoS\({}_2\) transistor, published in the literature, is used to simulate the proposed ADC. Due to their high ON/OFF current ratio and nanoscale geometry, MoS\({}_2\) FETs enable significant reductions in ADC active area and dynamic power relative to traditional device technologies. Simulation results reveal that the differential nonlinearity (DNL) ranges of [-0.18, 0.12]LSB , and the integral nonlinearity (INL) ranges of [-0.32, 0.24]LSB, both satisfying the requirements for 4-bit resolution at a 2 V operating voltage. In addition, the low ADC active area of 3050 \(\mu m^2\) rendering it well-suited for implementation in very large-scale integration (VLSI) circuits. Variations in process, temperature, and supply voltage affect the proposed method, and their influence on ADC performance is analyzed.

Abstract Image

基于MoS \({}_2\)晶体管的高能效闪存ADC架构
在本文中,我们利用二硫化钼(MoS \({}_2\))晶体管的优势,设计了一个Flash模数转换器(ADC),实现了减少有源面积和动态功率。MoS \({}_2\)场效应晶体管(fet)是一类基于二维(2D)材料的新兴器件,提供高开/关电流比,出色的静电控制和可扩展性,使其适用于下一代低功耗电子产品。为了消除静态功耗,该ADC采用了阈值逆变量化(TIQ)技术。一个spice兼容的基于电荷的MoS \({}_2\)晶体管模型,发表在文献中,被用来模拟所提出的ADC。由于其高开/关电流比和纳米级几何结构,MoS \({}_2\) fet相对于传统器件技术可显著降低ADC的有源面积和动态功率。仿真结果表明,差分非线性(DNL)范围为[-0.18,0.12]LSB,积分非线性(INL)范围为[-0.32,0.24]LSB,均满足2 V工作电压下4位分辨率的要求。此外,3050 \(\mu m^2\)的低ADC有源面积使其非常适合在超大规模集成(VLSI)电路中实现。工艺、温度和电源电压的变化会影响所提出的方法,并分析了它们对ADC性能的影响。
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来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
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