{"title":"A multi-channel OOK/BFSK transmitter with FoM of 99.99/91.2 and HD3/5 <−40 dBc","authors":"Shiwei Li , Jiwei Huang","doi":"10.1016/j.mejo.2025.106875","DOIUrl":null,"url":null,"abstract":"<div><div>A 423.5–450 MHz low-power OOK/BFSK wireless transmitter (TX) is presented for biomedical applications. The TX utilizes injection locking, frequency multiplication, and harmonic rejection techniques. A frequency synthesizer based on low-frequency phase rotation enables multi-channel support and BFSK modulation. High-frequency quantization noise introduced by the delta-sigma modulator (DSM) is filtered out using an N-path filter and dual multi-phase injection-locked ring oscillators (ILROs). Finally, a harmonic-rejection edge combiner (HREC) is used to achieve 5X frequency multiplication, effectively lowering the operating frequency of other circuits and significantly reducing the system’s power consumption. The HREC provides rejection of the <span><math><mrow><mn>3</mn><mi>rd</mi></mrow></math></span>/<span><math><mrow><mn>5</mn><mi>th</mi></mrow></math></span> harmonics while generating the desired carrier frequency. The TX is designed using a 65 nm CMOS process with a core area of 0.0625 <span><math><msup><mrow><mi>mm</mi></mrow><mrow><mn>2</mn></mrow></msup></math></span>. The simulation results show that the TX consumes 985 <span><math><mi>μ</mi></math></span>W at 1 V supply voltage and can provide −6.62 dBm output power to a <span><math><mrow><mn>50</mn><mspace></mspace><mi>Ω</mi></mrow></math></span> load without any on-chip or off-chip inductance, which reduces the chip area. The TX achieves <span><math><mo><</mo></math></span>−40 dBc rejection for both <span><math><mrow><mn>3</mn><mi>rd</mi></mrow></math></span> and <span><math><mrow><mn>5</mn><mi>th</mi></mrow></math></span> harmonics, supports data rates of 45/6 Mbps under OOK/BFSK modulation, respectively, achieving energy efficiency of 21.8/164 pJ/bit and FoM of 99.99/91.2.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"166 ","pages":"Article 106875"},"PeriodicalIF":1.9000,"publicationDate":"2025-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239125003248","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A 423.5–450 MHz low-power OOK/BFSK wireless transmitter (TX) is presented for biomedical applications. The TX utilizes injection locking, frequency multiplication, and harmonic rejection techniques. A frequency synthesizer based on low-frequency phase rotation enables multi-channel support and BFSK modulation. High-frequency quantization noise introduced by the delta-sigma modulator (DSM) is filtered out using an N-path filter and dual multi-phase injection-locked ring oscillators (ILROs). Finally, a harmonic-rejection edge combiner (HREC) is used to achieve 5X frequency multiplication, effectively lowering the operating frequency of other circuits and significantly reducing the system’s power consumption. The HREC provides rejection of the / harmonics while generating the desired carrier frequency. The TX is designed using a 65 nm CMOS process with a core area of 0.0625 . The simulation results show that the TX consumes 985 W at 1 V supply voltage and can provide −6.62 dBm output power to a load without any on-chip or off-chip inductance, which reduces the chip area. The TX achieves −40 dBc rejection for both and harmonics, supports data rates of 45/6 Mbps under OOK/BFSK modulation, respectively, achieving energy efficiency of 21.8/164 pJ/bit and FoM of 99.99/91.2.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.