Bit Plane Slicing Concept Realization in Hardware Chip for Digital Image Processing

Abstract

A technique for expressing an image in which each pixel is represented by one or more bits of the byte is known as bit plane slicing (BPS). The BPS method necessitates the use of a bit-slicing algorithm to include hidden data in any one of the eight slices. This method uses 8 bits to represent each pixel in an (8 × 8) image. The information in a grayscale image is encoded using 8 bits since each pixel's value falls between 0 and 255. Bit plane slicing is widely used in data hiding, image compression, and other related applications of image processing in security, privacy, encryption-decryption, health care data processing, and so on. The research article provides bit plane slicing concept realization in hardware chips for digital image processing in which the 4-bit and the 8-bit images are processed to estimate the different planes and corresponding values in Xilinx ISE14.7 software using VHDL programming. In the Modelsim 10.0 software, the functional simulation is carried out for these planes with various stimulation inputs to verify the functionality of the design.

Significance Statement Bit plane slicing is a widely used concept used in digital image applications. The significance of the work is that the work provides the platform to realize the concept at the hardware chip level and how parallel processing can be used to provide the outputs in different planes based on 8-bit image processing.