Time–temperature superposition characterization of viscoelastic behavior of a die-attach thin film for ultra-thin stacked chip scale packages

Abstract

Ultra-thin stacked chip scale packaging (UT-SCSP) technology has been widely used to package many non-CPU products, such as wireless and communication devices. In this package, multiple thin silicon dice are stacked on top of each other, and a thin layer of die-attach adhesive is applied between two adjacent Si dice. Consequently, the thermal expansion and viscoelastic properties of the die-attach material have an important effect on package thermal stress and warpage development. In this study, the thermal expansion behavior of a thin film die-attach material used for UT-SCSP applications was determined by thermomechanical analyzer (TMA), whereas the viscoelastic behavior was characterized by conducting time–temperature superposition (TTS) experiments using dynamic mechanical analyzer (DMA). From the TTS results, master curves were constructed for both the storage (\(E^{\prime \prime}\)), the loss moduli (\(E^{\prime \prime}\)), and the loss factor (\(\text{tan}\delta )\) as a function of frequency at a preselected reference temperature. Shift factors were obtained by fitting the experimental data to the Williams–Landel–Ferry (WLF) equation. Knowing the shift factors and the frequency and temperature dependences of \(E^{\prime } \left( {\omega ,T} \right)\) and \(E^{\prime \prime } \left( {\omega ,T} \right)\), one can obtain the time dependence of the relaxation modulus E(T, t) for various temperatures. The obtained master curves were analyzed using the Havriliak–Negami relaxation model, from which the four temperature-independent relaxation parameters (\(\alpha\), \(\beta\), \({E}_{0}\), and \({E}_{\infty }\)) and one temperature-dependent average relaxation time \(\tau (T)\) can be extracted. These results characterized the relaxation behavior of the die-attach material and provided key material properties for modeling package stress development.