A 3-bit/Unit Time-Domain Compute-In-Memory Macro With Adjustable Unit Delay

IF 3.1 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-07-10 DOI:10.1109/TVLSI.2025.3585360

Xie He;Dongxu Li

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引用次数: 0

Abstract

With the increasing demand for high-energy efficiency in multiply-accumulate (MAC) operations within deep learning accelerators, computing-in-memory (CIM) has gained significant attention. Time-domain (TD) CIM eliminates the need for analog-to-digital converters (ADCs), but single-bit delay units suffer from low computational efficiency. To address these issues, this work presents a TD multibit-per-unit CIM macro that leverages a precision-configurable time-to-digital converter (TDC) to enable accuracy configurability. Experimental results show that the proposed design achieves a 3-bit delay unit as a multibit CIM unit and an overall of 3-byte weight precision and 8-bit input precision. Compared to using three 1-bit/unit CIM delay units with an adder, it achieves a linearity with linear offset less than 3%. Besides, bias voltage adjusts the frequency and precision of the circuit (from 600 to 900 mV), enabling a minimum delay step of 0.11 ns. This system achieves a maximum energy efficiency of 268 TOPS/W under different VDD, making it a promising solution for always-on edge AI applications.

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具有可调单位延迟的3位/单位时域内存宏

随着深度学习加速器对高能效乘法累加运算（MAC）的需求不断增加，内存计算（CIM）得到了广泛关注。时域（TD） CIM消除了对模数转换器（adc）的需求，但单比特延迟单元的计算效率较低。为了解决这些问题，本工作提出了一个每单位多比特的TD CIM宏，该宏利用精确可配置的时间-数字转换器（TDC）来实现精确可配置性。实验结果表明，该设计实现了3位延迟单元作为多比特CIM单元，总体上具有3字节权重精度和8位输入精度。与使用三个1位/单位的CIM延迟单元和加法器相比，它实现了线性偏移小于3%的线性度。此外，偏置电压调节电路的频率和精度（从600到900 mV），使最小延迟步长为0.11 ns。该系统在不同VDD下实现了268 TOPS/W的最高能效，使其成为始终在线的人工智能应用的有前途的解决方案。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.