Nan Du, Ilia Polian, Christopher Bengel, Kefeng Li, Ziang Chen, Xianyue Zhao, Uwe Hübner, Li-Wei Chen, Feng Liu, Massimiliano Di Ventra, Stephan Menzel, Heidemarie Krüger
{"title":"Mixed-mode in-memory computing: towards high-performance logic processing in a memristive crossbar array.","authors":"Nan Du, Ilia Polian, Christopher Bengel, Kefeng Li, Ziang Chen, Xianyue Zhao, Uwe Hübner, Li-Wei Chen, Feng Liu, Massimiliano Di Ventra, Stephan Menzel, Heidemarie Krüger","doi":"10.1038/s44172-025-00461-y","DOIUrl":null,"url":null,"abstract":"<p><p>In-memory computing is a promising alternative to traditional computer designs, as it helps overcome performance limits caused by the separation of memory and processing units. However, many current approaches struggle with unreliable device behavior, which affects data accuracy and efficiency. In this work, the authors present a new computing method that combines two types of operations-those based on electrical resistance and those based on voltage-within each memory cell. This design improves reliability and avoids the need for expensive current measurements. A new software tool also helps automate the design process, supporting highly parallel operations in dense two-dimensional memory arrays. The approach balances speed and space, making it practical for advanced computing tasks. Demonstrations include a digital adder and a key part of encryption module, showing both strong performance and accuracy. This work offers a new direction for reliable and efficient in-memory computing systems with real-world applications.</p>","PeriodicalId":72644,"journal":{"name":"Communications engineering","volume":"4 1","pages":"163"},"PeriodicalIF":0.0000,"publicationDate":"2025-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC12460548/pdf/","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Communications engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1038/s44172-025-00461-y","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In-memory computing is a promising alternative to traditional computer designs, as it helps overcome performance limits caused by the separation of memory and processing units. However, many current approaches struggle with unreliable device behavior, which affects data accuracy and efficiency. In this work, the authors present a new computing method that combines two types of operations-those based on electrical resistance and those based on voltage-within each memory cell. This design improves reliability and avoids the need for expensive current measurements. A new software tool also helps automate the design process, supporting highly parallel operations in dense two-dimensional memory arrays. The approach balances speed and space, making it practical for advanced computing tasks. Demonstrations include a digital adder and a key part of encryption module, showing both strong performance and accuracy. This work offers a new direction for reliable and efficient in-memory computing systems with real-world applications.