A BVD-based on-chip bandpass filter with simplified source-load coupling for 5G N77 band using HRS IPD technology

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Yuhan Cao, Bukun Xu, Bo Yuan, Gaofeng Wang
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引用次数: 0

Abstract

This letter presents a compact on-chip N77 band filter exhibiting high rejection and low insertion loss. A novel design method is proposed to enhance the performance of lumped-element circuits through the analysis of bulk acoustic wave (BAW) resonators. First, the resonant and anti-resonant frequencies of the BAW resonator are optimally designed based on N77 band specifications. We then integrate the resonator in parallel with a simplified source-load coupling network. This integration significantly improves low-end rejection. It also maintains low insertion loss. Following capacitance adjustment, the resonator is replaced with an equivalent Butterworth–Van Dyke (BVD) model, enabling wider resonator bandwidth and effective spurious signal rejection. Analysis of S-parameter magnitude/phase and admittance elucidates the source-load coupling mechanism, which generates transmission zeros (TZs) at both passband edges, thus enhancing selectivity. The filter is fabricated using high-resistivity silicon (HRS) IPD technology. It achieves a compact size of 1.3 × 0.7 mm2. Measurement results show an insertion loss of less than 1.7 dB. The relative bandwidth exceeds 61.3 % across the passband.
一种基于bvd的片上带通滤波器,采用HRS IPD技术,简化了5G N77频段的源负载耦合
本文介绍了一种紧凑的片上N77带滤波器,具有高抑制和低插入损耗。通过对体声波谐振器的分析,提出了一种提高集总元电路性能的新设计方法。首先,根据N77频段规范对BAW谐振器的谐振频率和反谐振频率进行了优化设计。然后,我们将谐振器与简化的源负载耦合网络并联集成。这种集成显著提高了低端拒绝。它还保持低插入损耗。电容调整后,谐振器被等效的Butterworth-Van Dyke (BVD)模型取代,从而实现更宽的谐振器带宽和有效的杂散信号抑制。s参数幅度/相位和导纳的分析阐明了源负载耦合机制,该机制在两个通带边缘产生传输零点,从而提高了选择性。该滤波器采用高电阻硅(HRS) IPD技术制造。它达到了1.3 × 0.7 mm2的紧凑尺寸。测量结果表明,插入损耗小于1.7 dB。整个通带的相对带宽超过61.3%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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