Bit-level compiler optimization for ultra low-power embedded systems

IF 4.1 2区 计算机科学 Q1 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Seonyeong Heo , Jiho Kim , Woohyeop Im , Jiyun Moon , Daehee Jang
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引用次数: 0

Abstract

Achieving ultra low-power consumption is essential for embedded systems deployed in harsh environments, such as space and deep sea locations, where energy resources are scarce and physical accessibility is limited. Typically, these systems employ ultra low-power microcontrollers that operate on narrow data widths of 8 or 16 bits at the microarchitecture level. If software developers do not carefully consider the data widths during programming, the resulting programs may be suboptimally optimized for these ultra low-power systems. To address this issue and enable more efficient low-power computing, this work proposes a novel optimizing compiler that supports bit-level analyses and transformations. The proposed compiler analyzes how each individual bit of a data item is utilized within a program to determine its optimal width. Consequently, the proposed compiler reduces unnecessary data movements and computational overhead on ultra low-power processors. This work implements the prototype compiler on top of the LLVM compiler framework and evaluates the performance impact of the optimized embedded applications with a processor simulator.
超低功耗嵌入式系统的位级编译器优化
实现超低功耗对于部署在恶劣环境中的嵌入式系统至关重要,例如空间和深海位置,这些环境中能源资源稀缺且物理可及性有限。通常,这些系统采用超低功耗微控制器,在微架构级别上操作8或16位的窄数据宽度。如果软件开发人员在编程过程中没有仔细考虑数据宽度,那么所得到的程序可能会对这些超低功耗系统进行次优优化。为了解决这个问题并实现更高效的低功耗计算,本工作提出了一种新的优化编译器,它支持位级分析和转换。该编译器分析了在程序中如何利用数据项的每个单独位来确定其最佳宽度。因此,所建议的编译器减少了超低功耗处理器上不必要的数据移动和计算开销。本工作在LLVM编译器框架之上实现了原型编译器,并使用处理器模拟器评估了优化后的嵌入式应用程序的性能影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Journal of Systems Architecture
Journal of Systems Architecture 工程技术-计算机:硬件
CiteScore
8.70
自引率
15.60%
发文量
226
审稿时长
46 days
期刊介绍: The Journal of Systems Architecture: Embedded Software Design (JSA) is a journal covering all design and architectural aspects related to embedded systems and software. It ranges from the microarchitecture level via the system software level up to the application-specific architecture level. Aspects such as real-time systems, operating systems, FPGA programming, programming languages, communications (limited to analysis and the software stack), mobile systems, parallel and distributed architectures as well as additional subjects in the computer and system architecture area will fall within the scope of this journal. Technology will not be a main focus, but its use and relevance to particular designs will be. Case studies are welcome but must contribute more than just a design for a particular piece of software. Design automation of such systems including methodologies, techniques and tools for their design as well as novel designs of software components fall within the scope of this journal. Novel applications that use embedded systems are also central in this journal. While hardware is not a part of this journal hardware/software co-design methods that consider interplay between software and hardware components with and emphasis on software are also relevant here.
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