A low-latency and area-efficient QCA-based quantum-dot design for next-generation digital sustainable systems

Abstract

Digital sustainable system plays a vital role in the advancement of dynamic industries, including agriculture, healthcare, smart cities, Edge Artificial Intelligence (AI), and the Internet of Things (IoT), by facilitating high-speed, low-power, and highly compressed processing. These systems are based on the capabilities of real-time execution, processing, and analysis of large-scale information with extreme power and area limitations. However, traditional Arithmetic Logic Units (ALUs) based on complementary metal-oxide semiconductors (CMOS) are becoming challenging in terms of scalability, power consumption, space demand, and nanoscale fabrication. The ALU is one of the most important parts of such systems and has a direct effect on the overall computing performance, but current implementations cannot sustain the requirements of next-generation applications. To overcome these shortcomings, this paper offers an area-efficient and low-latency ALU that can be designed with the quantum-dot cellular automata (QCA) technology, with the advantage of employing area-efficient layout and simple cell design. The proposed QCA-based ALU has high performance, less delay, and less energy consumption, which makes it properly suitable for the next generation of digital sustainable systems applications. The outcome of the simulation indicates that there are considerable performance gains, such as an 82.37% decrease in energy consumption, and a 9.21% decrease in area relative to current available design. These enhancements emphasize the power of QCA technology as a scalable and low-energy consumption alternative to CMOS in the realization of critical computing components in sustainable digital systems.