Investigation of the Gate Bias Dependent Single Event Leakage Current in p-GaN Gate High Electron Mobility Transistors

Abstract

This study investigates the effect of different gate biases on the leakage current of p-type GaN high electron mobility transistors (HEMTs) under heavy ion irradiation. Utilizing Ta ion irradiation, the leakage degradation at the gate bias $V_{\mathrm {gs}}$ range of 0 to −5 V was studied. The most severe degradation was observed at approximately $V_{\mathrm {gs}}=-3$ V. Electrical measurements revealed a 20% positive shift in threshold voltage (at $V_{\mathrm {gs}}=-3$ V), a two times increase in on-resistance, a reduction in Schottky barrier height, and a significant shift in the ideality factor after heavy ion exposure. Technology computer-aided design (TCAD) simulations indicated that increasing the magnitude of negative gate bias enhanced the internal electric field strength, while the lattice temperature exhibited a decreasing trend. The analysis suggests that under heavy ion irradiation, leakage current at different gate biases is primarily attributed to micro-burn channels formed via thermal excitation and carrier tunneling, with their likelihood governed by the internal electric field and lattice temperature. Under the intermediate gate bias, the electric field strength and lattice temperature inside the device were both higher, resulting in more micro-burned channels and a significantly higher leakage rate than other bias conditions. These findings can provide an important theoretical basis for the single event leakage degradation characteristics during the potential application of p-GaN HEMT devices in radiation environment.