OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis

IF 2.9 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Liwei Ni;Rui Wang;Miao Liu;Xingyu Meng;Xiaoze Lin;Junfeng Liu;Guojie Luo;Zhufei Chu;Weikang Qian;Xiaoyan Yang;Biwei Xie;Xingquan Li;Huawei Li
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引用次数: 0

Abstract

This article introduces OpenLS-DGF, an adaptive logic synthesis dataset generation framework, to enhance machine-learning (ML) applications within the logic synthesis process. Previous dataset generation flows were tailored for specific tasks or lacked integrated ML capabilities. While OpenLS-DGF supports various ML tasks by encapsulating the three fundamental steps of logic synthesis: 1) Boolean representation; 2) logic optimization; and 3) technology mapping. It preserves the original information in both Verilog and ML-friendly GraphML formats. The Verilog files offer semi-customizable capabilities, enabling researchers to insert additional steps and incrementally refine the generated dataset. Furthermore, OpenLS-DGF includes an adaptive circuit engine that facilitates the final dataset management and downstream tasks. The generated OpenLS-D-v1 dataset comprises 46 combinational designs from established benchmarks, totaling over 966 000 Boolean circuits. OpenLS-D-v1 supports integrating new data features, making it more versatile for new tasks. This article demonstrates the versatility of OpenLS-D-v1 through four distinct downstream tasks: circuit classification, circuit ranking, quality of results (QoR) prediction, and probability prediction. Each task is chosen to represent essential steps of logic synthesis, and the experimental results show the generated dataset from OpenLS-DGF achieves prominent diversity and applicability. The source code and datasets are available at https://github.com/Logic-Factory/ACE/blob/master/OpenLS-DGF.
OpenLS-DGF:用于逻辑综合中机器学习任务的自适应开源数据集生成框架
本文介绍了自适应逻辑合成数据集生成框架OpenLS-DGF,以增强逻辑合成过程中的机器学习(ML)应用。以前的数据集生成流程是为特定任务量身定制的,或者缺乏集成的ML功能。而OpenLS-DGF通过封装逻辑合成的三个基本步骤来支持各种ML任务:1)布尔表示;2)逻辑优化;3)技术映射。它以Verilog和ml友好的GraphML格式保存原始信息。Verilog文件提供了半可定制的功能,使研究人员能够插入额外的步骤并逐步完善生成的数据集。此外,OpenLS-DGF还包括一个自适应电路引擎,便于最终数据集管理和下游任务。生成的OpenLS-D-v1数据集包括来自已建立基准的46种组合设计,总计超过966,000个布尔电路。OpenLS-D-v1支持集成新的数据特性,使其更适用于新任务。本文通过四个不同的下游任务演示了OpenLS-D-v1的多功能性:电路分类、电路排序、结果质量(QoR)预测和概率预测。实验结果表明,OpenLS-DGF生成的数据集具有突出的多样性和适用性。源代码和数据集可从https://github.com/Logic-Factory/ACE/blob/master/OpenLS-DGF获得。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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