{"title":"An r-DFA-Based Layout Pattern Match Method Supporting Fuzzy Matching","authors":"Qianxi Chen;Yujiao Deng;Qiang Wu;Zhixiong Di","doi":"10.1109/TCAD.2025.3556969","DOIUrl":null,"url":null,"abstract":"As chip manufacturing approaches physical limits, the probability of defects due to specific chip layout structures has significantly increased. These defect-prone structures are known as lithographic hotspots. Pattern matching method is widely used in hotspot detection algorithms due to its efficiency and accuracy. However, traditional pattern matching algorithms face major challenges in both solution efficiency and flexibility for fuzzy matching. To overcome these limitations, an integer range-based deterministic finite automaton (r-DFA)-based layout pattern matching method supporting parallelization and fuzzy matching is proposed. Manhattan polygons in the layout are represented as multiple path strings, thereby transforming the pattern matching problem into a string regular expression search problem. To simplifies the construction of large integer range elements in fuzzy matching, the r-DFA is employed, enhancing construction efficiency and enabling the algorithm to achieve linear time complexity. Moreover, this approach focuses most of the matching process within each individual layout polygon, enabling parallelized matching across diverse layout polygons. Compared to the state-of-the-art, our approach supports fuzzy matching, and shows an average efficiency improvement of 1.23 times.","PeriodicalId":13251,"journal":{"name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","volume":"44 10","pages":"3938-3947"},"PeriodicalIF":2.9000,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10946971/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
As chip manufacturing approaches physical limits, the probability of defects due to specific chip layout structures has significantly increased. These defect-prone structures are known as lithographic hotspots. Pattern matching method is widely used in hotspot detection algorithms due to its efficiency and accuracy. However, traditional pattern matching algorithms face major challenges in both solution efficiency and flexibility for fuzzy matching. To overcome these limitations, an integer range-based deterministic finite automaton (r-DFA)-based layout pattern matching method supporting parallelization and fuzzy matching is proposed. Manhattan polygons in the layout are represented as multiple path strings, thereby transforming the pattern matching problem into a string regular expression search problem. To simplifies the construction of large integer range elements in fuzzy matching, the r-DFA is employed, enhancing construction efficiency and enabling the algorithm to achieve linear time complexity. Moreover, this approach focuses most of the matching process within each individual layout polygon, enabling parallelized matching across diverse layout polygons. Compared to the state-of-the-art, our approach supports fuzzy matching, and shows an average efficiency improvement of 1.23 times.
期刊介绍:
The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.