Bumpless Build Cube (BBCube) 3D: Heterogeneous 3D Integration Using WOW and COW

Abstract

We propose a novel technology called Bumpless Build Cube (BBCubeTM) 3D for AI and high-performance computing (HPC) applications that require high bandwidth and power efficiency. BBCube 3D is constructed through heterogeneous 3D integration, in which xPU (e.g., CPU, GPU, TPU) chiplets and DRAM dies are stacked using a combination of bumpless wafer-on-wafer (WoW) and chip-on-wafer (CoW) processes. The bumpless stacking process adopts a method similar to multilevel metallization in the back-end-of-line (BEOL), enabling BBCube to provide reliable and high-density interconnects between dies. Moreover, BBCube features low-capacitance and low-impedance through-silicon vias (TSVs) due to the use of thin silicon and slim TSV structures. To further enhance performance, a highly parallel DRAM architecture leveraging the bumpless WoW process is introduced. The high-density TSVs enable lower data transmission speeds without compromising bandwidth. Additionally, the adoption of four-phase shielded I/Os (FPS-I/O) allows for a reduction in power supply voltage. BBCube 3D has the potential to achieve a bandwidth 30 times higher than DDR5 and four times higher than HBM2E, while achieving bit access energy consumption reduced to one-twentieth that of DDR5 and one-fifth that of HBM2E. The low-impedance TSVs in BBCube ensure robust power integrity for the xPU stacked on top of the layered DRAM. Furthermore, integrating an xPU on top of the Cube enables efficient cooling of high-power xPUs. BBCube can accommodate an xPU with a power density exceeding 50 W/cm² — comparable to the latest GPUs — while maintaining the DRAM temperature below 95°C.