Optimization of superjunction MOSFET dynamic performance using Si1−xGex strained silicon

Abstract

Although Si_1−xGe_x strain engineering has been extensively developed in low-voltage CMOS technology, its application in superjunction (SJ) power MOSFETs remains insufficiently investigated. This work demonstrates two synergistic advantages of integrating Si_1−xGe_x in SJ architectures: (1) carrier mobility enhancement through stress-modulated effective mass reduction, and (2) heterojunction band engineering for improved body diode characteristics. A novel SJ MOSFET featuring a Si_1−xGe_x active region atop P/N pillars is proposed and analyzed via TCAD simulations. This design leverages stress effects at the Si_1−xGe_x/Si interface on carrier mobility and band structure, significantly enhancing reverse recovery performance without compromising forward conduction performance. TCAD simulations analyze the effects of Ge contents variation on interface stress and device static/dynamic characteristics. Significant interfacial stress occurs at the Si_1−xGe_x/Si heterojunction, increasing with Ge content x. This stress significantly modulates carrier mobility and bandgap. However, excessive Ge causes a significant increase in defect density within the Si_1−xGe_x layer, and stress relaxation induces high-density interface defects, severely degrading leakage current and breakdown voltage. Comprehensive trade-off analysis identifies an optimal Ge composition (x = 0.6), yielding reverse recovery charge Q_rr = 0.87 μC cm² and conduction loss E_on = 15.34 μJ cm². These values represent 78.7 % lower Q_rr and 37.3 % lower E_on than conventional Si-based SJ MOSFETs. These advancements demonstrate significant potential of Si_1−xGe_x SJ MOSFETs for high-frequency and high-voltage applications.