Improving Neural Network Fault Tolerance Against Weight Attack

IF 2.4 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Chia Jen Cheng;Ethan Chen;Vanessa Chen
{"title":"Improving Neural Network Fault Tolerance Against Weight Attack","authors":"Chia Jen Cheng;Ethan Chen;Vanessa Chen","doi":"10.1109/OJCAS.2025.3602678","DOIUrl":null,"url":null,"abstract":"The increase of neural networks used in mission-critical applications requires protecting model parameters to maintain correct inferences. While traditional threats like adversarial inputs have been well-studied, recent research in neural network security has explored attacking model weights to degrade prediction accuracy. Many studies focused on developing fault detection methods, and few recovery strategies have been offered. This work proposes combining neural compression technique with modular redundancy to enhance model parameters' fault tolerance against adversarial bit-flips at runtime. The fault tolerance improvement of the proposed method is demonstrated with two model architectures and two datasets. Further, a field programmable gate array realization of the scheme has been implemented to demonstrate a hardware proof of concept.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"6 ","pages":"383-392"},"PeriodicalIF":2.4000,"publicationDate":"2025-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11142271","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11142271/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

The increase of neural networks used in mission-critical applications requires protecting model parameters to maintain correct inferences. While traditional threats like adversarial inputs have been well-studied, recent research in neural network security has explored attacking model weights to degrade prediction accuracy. Many studies focused on developing fault detection methods, and few recovery strategies have been offered. This work proposes combining neural compression technique with modular redundancy to enhance model parameters' fault tolerance against adversarial bit-flips at runtime. The fault tolerance improvement of the proposed method is demonstrated with two model architectures and two datasets. Further, a field programmable gate array realization of the scheme has been implemented to demonstrate a hardware proof of concept.
改进神经网络对权重攻击的容错性
神经网络在关键任务应用中的应用越来越多,需要保护模型参数以保持正确的推理。虽然像对抗性输入这样的传统威胁已经得到了很好的研究,但最近在神经网络安全方面的研究已经探索了攻击模型权重来降低预测精度的方法。许多研究都集中在故障检测方法的开发上,而很少提出故障恢复策略。本文提出将神经压缩技术与模块化冗余相结合,提高模型参数在运行时对对抗性比特翻转的容错能力。通过两种模型结构和两个数据集验证了该方法的容错性改进。此外,还实现了该方案的现场可编程门阵列实现,以演示硬件概念验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
审稿时长
19 weeks
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信