{"title":"Multi-agent based minimal-layer via routing algorithm for PCB design","authors":"Jianhao Cao , Hao Cai , Ning Xu","doi":"10.1016/j.vlsi.2025.102533","DOIUrl":null,"url":null,"abstract":"<div><div>In Electronic Design Automation (EDA), the automatic routing of Printed Circuit Boards (PCBs) is essential for improving design efficiency and enhancing product performance. As electronic devices continue to evolve towards higher performance and miniaturization, PCB design becomes increasingly complex. Developing algorithms that effectively address these intricate routing challenges under constraints has emerged as a focal point of research. This paper introduces, for the first time, the adaptation of the Conflict-Based Search (CBS) algorithm from Multi-Agent Path Finding (MAPF) to PCB routing within the EDA domain. We propose a new routing method, termed the Minimal Layer Via (MLV)-CBS method, which achieves minimal vias while enhancing routing quality and efficiency. This method extends the CBS algorithm from point-to-point to line-to-line and integrates it with existing PCB routing theories. Additionally, we have developed two new strategies to enhance the efficiency of large-scale PCB routing: adaptive heatmap partitioning and congestion-negotiated routing order. Through theoretical analysis and experimental validation, these strategies have been shown to reduce solution times and improve efficiency. Tests on open-source PCB datasets indicate that the MLV-CBS algorithm performs favorably compared to commercial software and other algorithms. These results also provide valuable insights for the automation of PCB routing.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"106 ","pages":"Article 102533"},"PeriodicalIF":2.5000,"publicationDate":"2025-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025001907","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
In Electronic Design Automation (EDA), the automatic routing of Printed Circuit Boards (PCBs) is essential for improving design efficiency and enhancing product performance. As electronic devices continue to evolve towards higher performance and miniaturization, PCB design becomes increasingly complex. Developing algorithms that effectively address these intricate routing challenges under constraints has emerged as a focal point of research. This paper introduces, for the first time, the adaptation of the Conflict-Based Search (CBS) algorithm from Multi-Agent Path Finding (MAPF) to PCB routing within the EDA domain. We propose a new routing method, termed the Minimal Layer Via (MLV)-CBS method, which achieves minimal vias while enhancing routing quality and efficiency. This method extends the CBS algorithm from point-to-point to line-to-line and integrates it with existing PCB routing theories. Additionally, we have developed two new strategies to enhance the efficiency of large-scale PCB routing: adaptive heatmap partitioning and congestion-negotiated routing order. Through theoretical analysis and experimental validation, these strategies have been shown to reduce solution times and improve efficiency. Tests on open-source PCB datasets indicate that the MLV-CBS algorithm performs favorably compared to commercial software and other algorithms. These results also provide valuable insights for the automation of PCB routing.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.