An Overview on Dead-Time Distortion and Its Correction in PWM Inverters

Abstract

Pulse-width modulated (PWM) Inverters have extensive applications in the fields of motor drives, utility interface in power systems and uninterruptible power supplies etc. Such inverters generally require a small time-interval between turning off one switch and turning on the other switch in the same leg of a two-level VSI. This is called as ‘blanking time’ or ‘dead time’. In the presence of this ‘dead-time’, such inverters, suffer from a distortion in the output voltage, called ‘dead-time distortion’ while feeding lagging loads. Over the past few decades, intensive research was carried out in this area, which resulted in developing new techniques for mitigating the dead-time effect. This includes dead-time elimination techniques, new compensation algorithms with or without involving current sensor etc. This paper briefly discusses the dead-time effect and presents a review on different strategies for eliminating the same. Though the main focus of this paper is on discussing dead-time effect and its correction in two-level PWM inverter, but, this paper also tries to give a brief overview on dead-time effect in multi-level inverters and some of the correction techniques for the same. Recent developments have also been discussed to get an idea of the latest status in this area of research and to understand the possible scope of development in future.