A Hybrid Control Strategy to Boost Robustness and Harmonic Suppression Ability of Grid-Tied Inverter in Weak Grid with Background Harmonics

Abstract

The operational robustness of grid-tied inverters is critically challenged under weak grid conditions characterized by wide variations in grid impedance, while background harmonics in grid voltage induced by nonlinear loads severely degrade current quality. To address these dual challenges, this paper proposes a hybrid control strategy integrating an outer-loop repetitive control (RC) with an inner-loop proportional-phase lag compensation (PPLC) architecture. The proposed approach first establishes an equivalent current loop model and employs the PPLC strategy to stabilize system operation across a broad range of grid impedance fluctuations. Subsequently, an outer-loop RC scheme is systematically designed to enhance harmonic suppression. Key innovations include the implementation of a zero-phase-shift low-pass filter as the inner model parameter in the outer loop, combined with a compensator comprising a second-order low-pass filter, a phase-lead network, and an adaptive gain coefficient. Comprehensive simulations and experimental validations conducted on a semi-physical platform demonstrate that the hybrid strategy effectively maintains system stability under broad grid impedance variations (up to 18mH) and severe background harmonic distortion. The controlled grid current exhibits total harmonic distortion below 2%, satisfying IEEE 1547 standards while achieving superior robustness and enhanced harmonic attenuation. This dual-loop architecture provides a systematic solution for grid-tied inverters operating in challenging weak grid environments with nonlinear load disturbances.