Resource-efficient hardware architecture for low-light image enhancement

Abstract

This manuscript introduces a pipelined and resource-optimized hardware architecture for enhancing dark images with a better gain using a Logarithmic operator which can be auto-tuned by log-average luminance. In the beginning of this architecture, two stage convolutions are used to remove the noise and preserve the details of the images. This convolution operation is optimized through the use of an efficient buffering architecture, carefully tuned convolution coefficients, and a pipelined architecture, which collectively minimize resource consumption. This architecture employs a resource efficient and precise digit-recurrence-based technique for logarithmic calculations. Furthermore, logarithmic number system (LNS) is used to optimize the luminance enhancement module. The LNS reduces the cost of adaptation parameter implementation and simplifies complex arithmetic operations. Resource reutilization is employed to further optimize the adaptation parameter. These optimization results in a significant decrease in the usage of resources such as LUTs, registers, BRAM, and digital signal processors (DSP). This architecture can process low-light HD video with a good quality assessment parameter.