{"title":"An Energy-Efficient Image Deblurring Accelerator With Quad-Base-Quad-Scale Quantized Format and Layer Normalization-Aware Optimization","authors":"Jinhoon Jo;Jueun Jung;Kyuho Jason Lee","doi":"10.1109/TCSII.2025.3586657","DOIUrl":null,"url":null,"abstract":"This brief proposes a novel data-format-based image deblurring accelerator with layer normalization and UNet architecture optimization for mobile cameras. As the demand for photography in dynamic environments continues to grow and the limitations of physical stabilization are tightening, post-processing methods to restore sharp images have gained increasing attention, notably deblurring methods based on convolutional neural networks. However, their heavy computational cost hinders their integration into mobile computing platforms. The proposed accelerator enables energy-efficient acceleration of deblurring through the following three key features: 1) A Quad-base-Quad-scale Quantized format that maintains image quality with only 8-bit, reducing external memory access (EMA) by 33% and achieving 75.7% higher multiply-and-accumulation (MAC) energy efficiency compared to conventional 12-bit precision; 2) A Layer Normalization-Aware Optimization technique, enabling parallel normalization and fusion of affine transformation; 3) A dual-stationary systolic array architecture that selects the optimal dataflow for each UNet block based on processing element (PE) utilization. As a result, the proposed accelerator achieves 2.49 TOPS/W, which is <inline-formula> <tex-math>$2.23\\times $ </tex-math></inline-formula> higher than prior work, enabling energy-efficient deblurring for mobile applications.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1273-1277"},"PeriodicalIF":4.9000,"publicationDate":"2025-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11072449/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This brief proposes a novel data-format-based image deblurring accelerator with layer normalization and UNet architecture optimization for mobile cameras. As the demand for photography in dynamic environments continues to grow and the limitations of physical stabilization are tightening, post-processing methods to restore sharp images have gained increasing attention, notably deblurring methods based on convolutional neural networks. However, their heavy computational cost hinders their integration into mobile computing platforms. The proposed accelerator enables energy-efficient acceleration of deblurring through the following three key features: 1) A Quad-base-Quad-scale Quantized format that maintains image quality with only 8-bit, reducing external memory access (EMA) by 33% and achieving 75.7% higher multiply-and-accumulation (MAC) energy efficiency compared to conventional 12-bit precision; 2) A Layer Normalization-Aware Optimization technique, enabling parallel normalization and fusion of affine transformation; 3) A dual-stationary systolic array architecture that selects the optimal dataflow for each UNet block based on processing element (PE) utilization. As a result, the proposed accelerator achieves 2.49 TOPS/W, which is $2.23\times $ higher than prior work, enabling energy-efficient deblurring for mobile applications.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.