All-Digital CMOS Pulse-Shrinking Time-to-Digital Converter With Built-in Offset-Error Cancellation and Smart Temperature Sensor

IF 3.1 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-07-10 DOI:10.1109/TVLSI.2025.3585732

Chun-Chi Chen;Chao-Lieh Chen;Kai-Hsiang Chang

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引用次数: 0

Abstract

This brief presents an all-digital CMOS time-to-digital converter (TDC) with an integrated smart temperature sensor (STS), effectively reducing circuit complexity and cost. Unlike previous designs employing a single coupling unit, the proposed TDC adopts a two-coupling-unit structure, simplifying the overall architecture while enabling pulse-shrinking time measurement and offset-error cancellation within a single cyclic delay line. The built-in cancellation enhances linearity while minimizing overhead. Notably, the integrated STS requires only one additional coupling unit, ensuring a negligible impact on circuit complexity and cost. Fabricated using the TSMC 0.35-

$\mu $

m CMOS process, the proposed design demonstrates improved cost efficiency compared to prior works. Experimental results validate the successful measurement of time and temperature, highlighting the advantages of reduced complexity and cost savings.

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全数字CMOS脉冲收缩时间-数字转换器，内置偏移误差抵消和智能温度传感器

本文介绍了一种集成了智能温度传感器（STS）的全数字CMOS时间-数字转换器（TDC），有效地降低了电路的复杂性和成本。与以往采用单个耦合单元的设计不同，本文提出的TDC采用双耦合单元结构，简化了整体结构，同时在单个循环延迟线内实现了脉冲收缩时间测量和偏移误差抵消。内置抵消增强线性，同时最大限度地减少开销。值得注意的是，集成STS只需要一个额外的耦合单元，确保对电路复杂性和成本的影响可以忽略不计。采用TSMC 0.35- $\mu $ m CMOS工艺制造，与先前的工作相比，所提出的设计具有更高的成本效率。实验结果验证了时间和温度的成功测量，突出了降低复杂性和节省成本的优点。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.