FPGA-Oriented Design and Efficient Implementation of a Geometrically Tunable Multiscroll Conservative Chaotic System Without Equilibrium Points

IF 3.1 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Yerui Guang;Qun Ding;Dongxu Liu
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Abstract

Although multiscroll conservative chaotic systems exhibit rich dynamical characteristics and hold great potential for secure communications, existing designs generally suffer from limited controllability and low hardware implementation efficiency. To address these challenges, this article proposes a novel 4-D multiscroll conservative chaotic system based on a nonlinear feedback structure constructed using the floor function. This original approach simplifies the system’s logical structure, facilitating efficient hardware modeling while enabling flexible control over the number, amplitude, and spatial distribution of scrolls in 3-D space. The system’s high complexity and coexisting behaviors are validated through dynamical analyses, including equilibrium point analysis, Poincaré sections, and Lyapunov exponents (LEs). To achieve efficient deployment of the chaotic system on field-programmable gate array (FPGA) platforms, this article first simplifies the hardware implementation logic of the feedback structure through the design of an algorithmic model based on bitwise operations. Subsequently, precise control of the system’s module signals is achieved through a finite state machine (FSM) design. The results of the resource comparison analysis indicate that the proposed model achieves a high throughput of 10.08 Gbps while consuming only 1051 look-up tables (LUTs). The lower energy efficiency is 0.0264 mW/Mbps. Hardware-software co-simulation and oscilloscope visual output confirm the numerical precision and hardware feasibility of the proposed system. Finally, this system is integrated with the ZUC stream cipher to construct a novel encryption core, enabling asynchronous ciphertext transmission as well as encryption and decryption functions, thereby demonstrating its potential for secure hardware applications.
无平衡点几何可调谐多涡旋保守混沌系统的fpga设计与高效实现
尽管多涡旋保守混沌系统具有丰富的动态特性,在安全通信方面具有很大的潜力,但现有设计普遍存在可控性有限和硬件实现效率低等问题。为了解决这些问题,本文提出了一种新的基于非线性反馈结构的四维多涡旋保守混沌系统。这种原始的方法简化了系统的逻辑结构,促进了高效的硬件建模,同时能够灵活地控制三维空间中卷轴的数量、幅度和空间分布。通过动力学分析,包括平衡点分析、poincar剖面和Lyapunov指数(LEs),验证了系统的高复杂性和共存行为。为了实现混沌系统在现场可编程门阵列(FPGA)平台上的高效部署,本文首先通过设计基于位运算的算法模型,简化了反馈结构的硬件实现逻辑。随后,通过有限状态机(FSM)设计实现对系统模块信号的精确控制。资源比较分析的结果表明,该模型在仅消耗1051个查找表(lut)的情况下实现了10.08 Gbps的高吞吐量。较低的能源效率为0.0264 mW/Mbps。软硬件联合仿真和示波器视觉输出验证了系统的数值精度和硬件可行性。最后,将该系统与ZUC流密码集成,构建了一种新颖的加密核心,实现了异步密文传输以及加解密功能,从而展示了其在安全硬件应用中的潜力。
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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