SiHGNN: Leveraging Properties of Semantic Graphs for Efficient HGNN Acceleration

IF 2.9 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Runzhen Xue;Mingyu Yan;Dengke Han;Ziheng Xiao;Zhimin Tang;Xiaochun Ye;Dongrui Fan
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引用次数: 0

Abstract

Heterogeneous graph neural networks (HGNNs) have expanded graph representation learning to heterogeneous graph fields. Recent studies have demonstrated their superior performance across various applications, including circuit representation, chip design automation, and placement optimization, often surpassing existing methods. However, GPUs often experience inefficiencies when executing HGNNs due to their unique and complex execution patterns. Compared to traditional graph neural networks (GNNs), these patterns further exacerbate irregularities in memory access. To tackle these challenges, recent studies have focused on developing domain-specific accelerators for HGNNs. Nonetheless, most of these efforts have concentrated on optimizing the datapath or scheduling data accesses, while largely overlooking the potential benefits that could be gained from leveraging the inherent properties of the semantic graph, such as its topology, layout, and generation. In this work, we focus on leveraging the properties of semantic graphs to enhance HGNN performance. First, we analyze the semantic graph build (SGB) stage and identify significant opportunities for data reuse during semantic graph generation. Next, we uncover the phenomenon of buffer thrashing during the graph feature processing (GFP) stage, revealing potential optimization opportunities in semantic graph layout. Furthermore, we propose a lightweight hardware accelerator frontend for HGNNs, called SiHGNN. This accelerator frontend incorporates a tree-based SGB for efficient semantic graph generation and features a novel Graph Restructurer for optimizing semantic graph layouts. Experimental results show that SiHGNN enables the state-of-the-art HGNN accelerator to achieve an average performance improvement of $2.95\times $ .
利用语义图的属性实现高效的HGNN加速
异构图神经网络(hgnn)将图表示学习扩展到异构图域。最近的研究已经证明了它们在各种应用中的优越性能,包括电路表示,芯片设计自动化和放置优化,通常超过现有的方法。然而,gpu在执行hgnn时,由于其独特而复杂的执行模式,常常会遇到效率低下的问题。与传统的图神经网络(gnn)相比,这些模式进一步加剧了内存访问的不规则性。为了应对这些挑战,最近的研究集中在开发hgnn的特定域加速器上。尽管如此,大多数这些努力都集中在优化数据路径或调度数据访问上,而在很大程度上忽略了利用语义图的固有属性(如拓扑、布局和生成)可能获得的潜在好处。在这项工作中,我们专注于利用语义图的属性来提高HGNN的性能。首先,我们分析了语义图构建(SGB)阶段,并确定了语义图生成过程中数据重用的重要机会。接下来,我们揭示了图形特征处理(GFP)阶段的缓冲区抖动现象,揭示了语义图形布局中潜在的优化机会。此外,我们提出了一种用于hgnn的轻量级硬件加速器前端,称为SiHGNN。这个加速器前端集成了一个基于树的SGB,用于高效的语义图生成,并具有一个新颖的图形重构器,用于优化语义图布局。实验结果表明,SiHGNN使最先进的HGNN加速器的平均性能提高了2.95倍。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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