{"title":"Predicate abstraction for hyperliveness verification.","authors":"Raven Beutner, Bernd Finkbeiner","doi":"10.1007/s10703-025-00482-5","DOIUrl":null,"url":null,"abstract":"<p><p>Temporal hyperproperties are system properties that relate multiple execution traces. In finite-state systems, temporal hyperproperties are supported by model-checking algorithms, and tools for general temporal logics like HyperLTL exist. In infinite-state systems, the analysis of temporal hyperproperties has, so far, been limited to <i>k</i>-safety properties, i.e., properties that stipulate the absence of a bad interaction between any <i>k</i> traces. In this paper, we present an automated method for the verification of <math> <mrow><msup><mo>∀</mo> <mi>k</mi></msup> <msup><mo>∃</mo> <mi>l</mi></msup> </mrow> </math> -safety properties in infinite-state systems. A <math> <mrow><msup><mo>∀</mo> <mi>k</mi></msup> <msup><mo>∃</mo> <mi>l</mi></msup> </mrow> </math> -safety property stipulates that for any <i>k</i> traces, there exist <i>l</i> traces such that the resulting <math><mrow><mi>k</mi> <mo>+</mo> <mi>l</mi></mrow> </math> traces do not interact badly. This combination of universal and existential quantification captures many properties beyond <i>k</i>-safety, including hyperliveness properties such as generalized non-interference or program refinement. Our verification method is based on a strategy-based instantiation of existential trace quantification combined with a program reduction, both in the context of a fixed predicate abstraction.</p>","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"66 2","pages":"238-277"},"PeriodicalIF":0.8000,"publicationDate":"2025-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC12350583/pdf/","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Formal Methods in System Design","FirstCategoryId":"94","ListUrlMain":"https://doi.org/10.1007/s10703-025-00482-5","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2025/7/16 0:00:00","PubModel":"Epub","JCR":"Q3","JCRName":"COMPUTER SCIENCE, THEORY & METHODS","Score":null,"Total":0}
引用次数: 0
Abstract
Temporal hyperproperties are system properties that relate multiple execution traces. In finite-state systems, temporal hyperproperties are supported by model-checking algorithms, and tools for general temporal logics like HyperLTL exist. In infinite-state systems, the analysis of temporal hyperproperties has, so far, been limited to k-safety properties, i.e., properties that stipulate the absence of a bad interaction between any k traces. In this paper, we present an automated method for the verification of -safety properties in infinite-state systems. A -safety property stipulates that for any k traces, there exist l traces such that the resulting traces do not interact badly. This combination of universal and existential quantification captures many properties beyond k-safety, including hyperliveness properties such as generalized non-interference or program refinement. Our verification method is based on a strategy-based instantiation of existential trace quantification combined with a program reduction, both in the context of a fixed predicate abstraction.
期刊介绍:
The focus of this journal is on formal methods for designing, implementing, and validating the correctness of hardware (VLSI) and software systems. The stimulus for starting a journal with this goal came from both academia and industry. In both areas, interest in the use of formal methods has increased rapidly during the past few years. The enormous cost and time required to validate new designs has led to the realization that more powerful techniques must be developed. A number of techniques and tools are currently being devised for improving the reliability, and robustness of complex hardware and software systems. While the boundary between the (sub)components of a system that are cast in hardware, firmware, or software continues to blur, the relevant design disciplines and formal methods are maturing rapidly. Consequently, an important (and useful) collection of commonly applicable formal methods are expected to emerge that will strongly influence future design environments and design methods.