A minimal memristor emulator using DVCCTA for analog neuromorphic logic

IF 3.2 3区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Prerna Rana , Ashish Ranjan , J. Vista , Alak Majumder
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引用次数: 0

Abstract

This paper introduces the design of a Memristor Emulator Model (MEM) employing a Differential Voltage-Current-Controlled Transconductance Amplifier (DVCCTA). A comprehensive theoretical analysis is conducted, encompassing DVCCTA-based memristor modeling and configurations involving series and parallel connections. The designed memristor operates efficiently over a broad frequency range of 10 Hz–12 MHz while maintaining a low power dissipation of 2.76 mW. We simulated the circuit in the Cadence Virtuoso environment and verified its performance through Monte Carlo simulation and Process, Voltage, and Temperature (PVT) analysis. Additionally, this study explores the practical feasibility of DVCCTA-based memristors using commercially available ICs such as the AD830, CA3080, and LM741, highlighting their potential for real-world circuits.
一个使用DVCCTA模拟神经形态逻辑的最小忆阻器模拟器
介绍了采用差分压流控跨导放大器(DVCCTA)的忆阻器仿真器的设计。进行了全面的理论分析,包括基于dvccta的忆阻器建模和涉及串联和并联连接的配置。所设计的忆阻器在10hz - 12mhz的宽频率范围内高效工作,同时保持2.76 mW的低功耗。我们在Cadence Virtuoso环境中对电路进行了仿真,并通过蒙特卡罗仿真和过程、电压和温度(PVT)分析验证了电路的性能。此外,本研究探讨了使用商用ic(如AD830、CA3080和LM741)的基于dvccta的忆阻器的实际可行性,强调了它们在实际电路中的潜力。
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来源期刊
CiteScore
6.90
自引率
18.80%
发文量
292
审稿时长
4.9 months
期刊介绍: AEÜ is an international scientific journal which publishes both original works and invited tutorials. The journal''s scope covers all aspects of theory and design of circuits, systems and devices for electronics, signal processing, and communication, including: signal and system theory, digital signal processing network theory and circuit design information theory, communication theory and techniques, modulation, source and channel coding switching theory and techniques, communication protocols optical communications microwave theory and techniques, radar, sonar antennas, wave propagation AEÜ publishes full papers and letters with very short turn around time but a high standard review process. Review cycles are typically finished within twelve weeks by application of modern electronic communication facilities.
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