Heuristic-guided scatter search for X-architecture Steiner Minimum Tree problems in VLSI design

Abstract

Constructing Steiner Minimum Trees (SMT) remains a critical challenge in Very Large Scale Integration (VLSI) global routing, where minimizing wirelength is essential for optimizing circuit performance. While traditional Manhattan-based SMTs are constrained to two orthogonal routing directions, resulting in suboptimal interconnects, the X architecture, with its eight-directional (four rectilinear, four diagonal) routing, enables significant wirelength reductions. This paper introduces a Heuristic-Guided Scatter Search (HGSS) algorithm to efficiently solve the X-architecture SMT (XSMT) problem. The HGSS integrates a short-edge-first heuristic to prioritize compact routing solutions and reengineers three core Scatter Search modules: (1) a Dynamic Reference Set Update Module (DRSUM) that maintains elite and diverse solutions through iterative replacement, (2) a Semi-systematic Subset Generation Module (SSGM) pairing diverse and random elite solutions to reduce computational overhead, and (3) a Heuristic-Guided Solution Combination Module (HGSCM) employing crossover and mutation to generate high-quality offspring. Evaluations of GEO and ISPD98 benchmark circuits demonstrate average wirelength reductions of 1.04% and 2.86%, respectively, along with superior computational efficiency compared to state-of-the-art methods. By advancing XSMT optimization, this work demonstrates that incorporating heuristic information is valuable for solving large, complex routing tree problems, offering guidance for further research in this area.