Multilogic Sense Amplifier With a Circuit for Dynamic Reference Voltage Generation

IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Yen-Jen Chang;Kun-Lin Tsai;Chun Cheng;Xu-Yao Chen
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Abstract

The rapid development of artificial intelligence (AI) systems has engendered a considerable increase in the computational power required in data-intensive applications, including facial recognition and image processing applications. The conventional von Neumann architecture, in which large quantities of data are transmitted between processing units and memory units, creates a bottleneck in AI applications. In-memory computing (IMC) offers an efficient solution to this problem by enabling computations within memory units, thus reducing the need for data transmission. This paper proposes a multilogic sense amplifier (MSA) with a dynamic reference voltage (DRV) generation circuit (hereafter denoted as MSA-DRV) to enhance the performance and reduce the power consumption of static random-access memory (SRAM)-based IMC. The proposed MSA-DRV performs six logic operations, namely the AND, NAND, OR, NOR, XOR, and XNOR operations, within an SRAM array by using a novel DRV circuit. The DRV circuit enables the voltage threshold to be adaptively changed according to the requirements of different operations. Experimental results indicated that the proposed MSA-DRV had lower computational latency (on average 29.9% lower) and power consumption (on average 30.6% lower) than did a conventional sense amplifier design and reconfigurable assist sense amplifier. Thus, the proposed design can overcome the von Neumann bottleneck to facilitate high-speed, energy-efficient data processing, which is crucial for AI-based and other data-intensive applications.
带有动态参考电压产生电路的多逻辑感测放大器
人工智能(AI)系统的快速发展导致数据密集型应用(包括面部识别和图像处理应用)所需的计算能力大幅增加。在传统的冯·诺伊曼架构中,大量数据在处理单元和存储单元之间传输,这给人工智能应用带来了瓶颈。内存计算(IMC)通过支持内存单元内的计算,从而减少了对数据传输的需求,为这个问题提供了一个有效的解决方案。为了提高基于静态随机存取存储器(SRAM)的IMC的性能和降低功耗,本文提出了一种带有动态参考电压(DRV)产生电路的多逻辑感测放大器(MSA)(以下简称MSA-DRV)。本文提出的MSA-DRV通过一种新颖的DRV电路在SRAM阵列内执行AND、NAND、OR、NOR、XOR和XNOR等六种逻辑运算。DRV电路可以根据不同的操作要求自适应地改变电压阈值。实验结果表明,与传统感测放大器和可重构辅助感测放大器相比,MSA-DRV具有更低的计算延迟(平均降低29.9%)和更低的功耗(平均降低30.6%)。因此,所提出的设计可以克服冯·诺依曼瓶颈,促进高速、节能的数据处理,这对于基于人工智能和其他数据密集型应用至关重要。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems I: Regular Papers 工程技术-工程:电子与电气
CiteScore
9.80
自引率
11.80%
发文量
441
审稿时长
2 months
期刊介绍: TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.
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