An Area-Efficient 16–22 GHz Four-Antenna Phased Array Receiver Supporting Four Simultaneous Beams

Abstract

This letter presents an area-efficient 16–22 GHz four-antenna phased array receiver supporting four simultaneous beams. To relieve the design challenge of the large chip area-consuming caused by the multibeam combination, a current-domain phase shifted signal combining and compact passive signal connection network is proposed. Implemented in a 55-nm CMOS process, the receiver consumes a current of 630 mA with a 1.2 V supply. From 16 ~ 22 GHz, the receiver achieves a 360° phase shifting range with a step of 5.625°, and the root mean square (RMS) phase and/gain error is less than 3.8° and/0.4-dB, respectively. The receiver demonstrates a gain of 19.5 dB with less than ±0.5 dB gain variation, a 3.1–4.0 dB noise figure (NF), and an input-referred 1-dB gain compression point (IP1dB) of > −31 dBm. The chip size is only 2.7 × 3.6 mm².