Backside Active Power Delivery With Hybrid DC–DC Converter Enabled by Amorphous Oxide Semiconductor Transistors

Abstract

The increasing demand for energy-efficient computing has created the need for advanced power management solutions. Backside power delivery network (BSPDN) has been introduced in the industry for 2-nm node with passive wires. In this work, we propose adding active components (power transistors) to the backside of silicon in a back-end-of-line (BEOL)-compatible fabrication process. The goal is to enable 12–0.7-V voltage downconversion at the backside of silicon (near the point of load, i.e., the frontside logic compute die) to minimize the IR drop and improve overall system-level conversion efficiency. This work leverages a hybrid monolithic 3-D (M3D)dc-dc converter architecture combining switched-capacitor (SC) and synchronous buck converter topologies with BEOL-compatible active and passive devices. The design employs amorphous tungsten-doped indium oxide (IWO) transistors, which offer high breakdown voltage and tunable threshold voltages, supporting both enhancement and depletion modes for efficient switching. With the experimentally calibrated compact models, the simulated hybrid converter design achieves 12–0.7-V conversion with a peak efficiency of 95.6% at a power density of 330 mW/mm², demonstrating the feasibility of M3D SC dc-dc converters for next-generation power management in high-performance edge devices.