Controllable formation of HfO2thin film in 20-nm-thick lateral trenches with high aspect ratio up to 30.

IF 2.8 4区 材料科学 Q3 MATERIALS SCIENCE, MULTIDISCIPLINARY
Yingjie Fan, Ya Wang, Haiteng Huang, Jingjing Zhang, Lihui Yu, Jingquan Guo, Qiutong Zhao, Yiling Zhang, Zhuzhuoyue Chen, Shujun Ye
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引用次数: 0

Abstract

Ultimate-Vertical-Gate-All-Around (UVGAA) MOSFET represent an advanced evolution of vertical GAA (VGAA) architectures, featuring source-drain symmetry enabled by simultaneous formation of both terminals. Derived from the fabrication methods of 3D NAND flash memory, UVGAA MOSFET offer potential for vertically stacked logic circuits. However, their implementation demands ultra-thin sacrificial Si3N4 layers and higher lateral-high-aspect-ratio (LHAR) trench structures compared to 3D NAND flash memory. In this study, 20 nm-thick multilayer LHAR trench structures with aspect ratio up to 30 were successfully fabricated via a combined dry and wet etching approach applied to SiO2-Si3N4-SiO2 multilayer stacks. Hafnium dioxide (HfO₂) thin films were subsequently deposited within these confined geometries and on planar silicon surfaces using atomic layer deposition (ALD). By systematically optimizing key process parameters: precursor pulse time and purge duration-optimal conditions for uniform and conformal film growth were established. The comprehensive deposition behavior of HfO₂ films in different geometric structures has been qualitatively analyzed using the molecular diffusion theory and the surface adsorption kinetics model. Resulting HfO₂ films exhibited predominantly amorphous structure, ultra-low surface roughness, and excellent electrical properties. This study establishes a theoretical framework and process foundation for the miniaturization and performance optimization of next-generation 3D integrated circuits.

在20 nm厚的横向沟槽中可控形成高纵横比高达30的hfo2薄膜。
终极垂直栅极全能(UVGAA) MOSFET代表了垂直GAA (VGAA)架构的高级发展,其特点是通过同时形成两个终端实现源漏对称。UVGAA MOSFET源自3D NAND闪存的制造方法,为垂直堆叠逻辑电路提供了潜力。然而,与3D NAND闪存相比,它们的实现需要超薄的牺牲Si3N4层和更高的横向高纵横比(LHAR)沟槽结构。在本研究中,采用干湿联合蚀刻方法,成功制备了20 nm厚的长宽比高达30的多层LHAR沟槽结构,并将其应用于SiO2-Si3N4-SiO2多层堆叠中。二氧化铪(HfO₂)薄膜随后在这些受限的几何形状和使用原子层沉积(ALD)在平面硅表面沉积。通过对关键工艺参数前驱体脉冲时间和吹扫时间的系统优化,确定了膜均匀、保形生长的最佳条件。采用分子扩散理论和表面吸附动力学模型定性分析了不同几何结构HfO 2膜的综合沉积行为。所得的HfO 2薄膜主要表现为非晶结构、超低表面粗糙度和优异的电性能。本研究为下一代3D集成电路的小型化和性能优化奠定了理论框架和工艺基础。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Nanotechnology
Nanotechnology 工程技术-材料科学:综合
CiteScore
7.10
自引率
5.70%
发文量
820
审稿时长
2.5 months
期刊介绍: The journal aims to publish papers at the forefront of nanoscale science and technology and especially those of an interdisciplinary nature. Here, nanotechnology is taken to include the ability to individually address, control, and modify structures, materials and devices with nanometre precision, and the synthesis of such structures into systems of micro- and macroscopic dimensions such as MEMS based devices. It encompasses the understanding of the fundamental physics, chemistry, biology and technology of nanometre-scale objects and how such objects can be used in the areas of computation, sensors, nanostructured materials and nano-biotechnology.
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