Guru Siva Subramanian V., Deepika Sree T.N. , Aditya S.
{"title":"A Low cost area-efficient modified Russian peasant multiplier(MRPM) for biomedical applications","authors":"Guru Siva Subramanian V., Deepika Sree T.N. , Aditya S.","doi":"10.1016/j.vlsi.2025.102474","DOIUrl":null,"url":null,"abstract":"<div><div>The essentiality of efficient hardware multipliers has increased as they have a huge impact on the performance and the power consumption of digital systems. This work proposes a novel 8-bit unsigned multiplier architecture which combines the Modified Russian Peasant algorithm with a Kogge-Stone adder. The aim of the proposed design is to minimize resource usage and power consumption while retaining high speed and accuracy. The effective optimization of the multiplier design led to a significant reduction in area utilization and overall power consumption, making it highly suitable for implementing in resource constrained systems. The design is validated using Xilinx Vivado tool and is implemented on Nexys A7 FPGA board. The results show that the proposed multiplier utilizes fewer devices (50%–70% less) and has comparative speed and power consumption with respect to the conventional multipliers. The proposed multiplier design can be used for biomedical systems such as wearable health monitors and implantable medical devices, where compact size and energy efficiency are key considerations. This efficient multiplier architecture ensures prolonged battery life and reliable performance, enabling advanced signal processing tasks such as signal filtering, enhancement of medical imaging and noise reduction in hearing aids. These features emphasize the multiplier’s potential to enable substantial enhancements in high-performance, area-sensitive, and power-sensitive biomedical applications, which will contribute to the forthcoming compact and energy-efficient healthcare systems.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"104 ","pages":"Article 102474"},"PeriodicalIF":2.5000,"publicationDate":"2025-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025001312","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
The essentiality of efficient hardware multipliers has increased as they have a huge impact on the performance and the power consumption of digital systems. This work proposes a novel 8-bit unsigned multiplier architecture which combines the Modified Russian Peasant algorithm with a Kogge-Stone adder. The aim of the proposed design is to minimize resource usage and power consumption while retaining high speed and accuracy. The effective optimization of the multiplier design led to a significant reduction in area utilization and overall power consumption, making it highly suitable for implementing in resource constrained systems. The design is validated using Xilinx Vivado tool and is implemented on Nexys A7 FPGA board. The results show that the proposed multiplier utilizes fewer devices (50%–70% less) and has comparative speed and power consumption with respect to the conventional multipliers. The proposed multiplier design can be used for biomedical systems such as wearable health monitors and implantable medical devices, where compact size and energy efficiency are key considerations. This efficient multiplier architecture ensures prolonged battery life and reliable performance, enabling advanced signal processing tasks such as signal filtering, enhancement of medical imaging and noise reduction in hearing aids. These features emphasize the multiplier’s potential to enable substantial enhancements in high-performance, area-sensitive, and power-sensitive biomedical applications, which will contribute to the forthcoming compact and energy-efficient healthcare systems.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.