A pre-congestion-aware deterministic-adaptive hybrid routing (PcaDAHR) algorithm for network-on-chip

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2025-07-16 DOI:10.1016/j.mejo.2025.106811

Ning Ji, Yintang Yang

引用次数: 0

Abstract

Nowadays, it is crucial to address the communication challenges associated with multiple-core technology. Network-on-chip (NoC) offers an efficient solution and has emerged as a focal point. Routing algorithms play a critical role in determining the performance metrics of NoCs. In this paper, we propose a novel pre-congestion-aware deterministic-adaptive hybrid routing (PcaDAHR) algorithm that combines the adjacent congestion status of the source node with the deterministic routing algorithm to make the final routing decision. The forwarding path is unique and deadlock-free. It will be recorded in the head flit at the packet injection stage, eliminating the need for the routing calculation unit. Simulation results demonstrate that PcaDAHR reduces average packet latency by at least 3.3 % while improving saturation throughput by at least 4.6 % compared to traditional routing schemes without increasing the hardware overhead.

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片上网络的预拥塞感知确定性自适应混合路由（PcaDAHR）算法

如今，解决与多核技术相关的通信挑战至关重要。片上网络（NoC）提供了一种高效的解决方案，并已成为焦点。路由算法在确定noc的性能指标方面起着至关重要的作用。在本文中，我们提出了一种新的预拥塞感知的确定性自适应混合路由（PcaDAHR）算法，该算法将源节点相邻的拥塞状态与确定性路由算法相结合，做出最终的路由决策。转发路径唯一且无死锁。在数据包注入阶段，它将被记录在头部文件中，从而消除了路由计算单元的需要。仿真结果表明，与传统路由方案相比，PcaDAHR在不增加硬件开销的情况下，将平均数据包延迟降低至少3.3%，同时将饱和吞吐量提高至少4.6%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.